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MPQ8612 high efficiency, 12a/16a/20a, 6v synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 1 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. the future of analog ic technology description the MPQ8612 is fully integrated high frequency synchronous rectified step-down switch mode converter. it offers very compact solutions to achieve 12a/16a/20a output current from a 3v to 6v input with excellent load and line regulation. constant-on-time (cot) control mode provides fast transient response and eases loop stabilization. the MPQ8612 can operate with a low-cost electrolytic capacitor and can support ceramic output capacitor with external slope compensation. operating frequency is programmed by an external resistor and is compensated for variations in v in . under voltage lockout is internally set at 2.8 v, but can be increased by programming the threshold with a resistor network on the enable pin. the output voltage startup ramp is controlled by the soft start pin. a power good signal indicates the output is within its nominal voltage range. full fault protection including ocp, scp, ovp uvp and otp is provided by internal comparators. the MPQ8612 requires a minimum number of readily available standard external components and are available in qfn3x4/4x4/4x4 pack ages. features ? 1.5v to 6v wide input range ? 3v to 6v vcc operating supply ? 12a/16a/20a output current ? low r ds (on) internal power mosfets ? proprietary switching loss reduction technique ? adaptive cot for ultrafast transient response ? 1% reference voltage over -20 ? c to +85 ? c junction temperature range ? programmable soft start time ? pre-bias start up ? programmable switching frequency from 300khz to 1mhz. ? minimum on time t on_min =60ns minimum off time t off_min =75ns ? non-latch ocp, non-latch ovp protection and thermal shutdown ? output adjustable from 0.608v to 4.5v applications ? telecom system base stations ? networking systems ? server ? personal video recorders ? flat panel television and monitors ? distributed power systems all mps parts are lead-free and adhere to the rohs directive. for mps green status, please visit mps website under products, quality assurance page. ?mps? and ?the future of analog ic technology? are registered trademarks o f monolithic power systems, inc. typical application
MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 2 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. ordering information part number* package top marking MPQ8612gl-12 qfn (3x4mm) mp8612 12 MPQ8612gr-16 qfn (4x4mm) mp8612 16 MPQ8612gr-20 qfn (4x4mm) mp8612 20 * for tape & reel, add suffix ?z (e.g. MPQ8612gl?z); package reference top view 1 2 3 4 5 6 78 9 10 11 12 13 14 sw sw freq in in agnd fb ss en vcc pg bst gnd gnd exposed pad on backside part number*** package MPQ8612gl-12 qfn14 (3x4mm) *** for tape & reel, add suffix ?z (eg. MPQ8612gl?12?z) top view 1 2 3 4 5 6 789 11 14 15 16 sw sw freq in in agnd fb ss en vcc pg bst gnd gnd exposed pad on backside in 10 gnd 12 13 17 sw top view 1 2 3 4 5 6 789 11 14 15 16 sw sw freq in in agnd fb ss en vcc pg bst gnd gnd exposed pad on backside in 10 gnd 12 13 17 sw part number**** package part number***** package MPQ8612gr-16 qfn17 (4x4mm) MPQ8612gr-20 qfn17 (4x4mm) **** for tape & reel, add suffix ?z (eg. MPQ8612gr-16?z) ***** for tape & reel, add suffix ?z (eg. MPQ8612gr-20?z) MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 3 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. absolute maxi mum ratings (1) supply voltage v in ...................................... 6.5v v sw ........................................-0.3v to v in + 0.3v v sw (30ns)...................................-3v to v in + 3v v in -v sw .................................-0.3v to v in + 0.3v v in -v sw (30ns) ............................-3v to v in + 3v v bst ...................................................... v sw + 6v all other pins ..................................-0.3v to +6v continuous power dissipation (t a =+25 ? ) (2) ?? qfn(3x4mm)???????...?????2.6w qfn(4x4mm)???????...?????2.8w junction temperature ...............................150 ? c lead temperature ....................................260 ? c storage temperature............... -65 ? c to +150 ? c recommended operating conditions (3) input supply voltage v in ....................1.5v to 6v vcc supply voltage v cc ......................3v to 6v output voltage v out ....................0.608v to 4.5v operating junction temp. (t j ). -40c to +125c thermal resistance (4) ja jc qfn (3x4mm) ......................... 48 ...... 10... ? c/w qfn (4x4mm) ......................... 44 ....... 9.... ? c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max)=(t j (max)- t a )/ ja . exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51-7, 4-layer pcb. MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 4 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. electrical characteristics v in = 5v, t j = -40 to +125 ? c, unless otherwise noted. parameters symbol condition min typ max units supply current supply current (shutdown) i in v en = 0v 0.001 2 a v en = 2v, v fb = 1v, MPQ8612-12 850 1100 1300 a supply current (quiescent) i in v en = 2v, v fb = 1v, MPQ8612-16, MPQ8612-20 600 1000 1300 a mosfet MPQ8612-12, t j =25 ? c 10 18 MPQ8612-16, t j =25 ? c 7.4 13 high-side switch on resistance hs rds-on MPQ8612-20, t j =25 ? c 6.6 12 m ? MPQ8612-12, t j =25 ? c 7.8 10 MPQ8612-16, t j =25 ? c 5.5 11 low-side switch on resistance ls rds-on MPQ8612-20, t j =25 ? c 4.6 9.5 m ? switch leakage sw lkg v en = 0v, v sw = 0v or 5v, t j =25 ? c 0.001 5 a current limit MPQ8612-12 17 21 26 MPQ8612-16 23 28 33 high-side current limit i limit MPQ8612-20 29 35 41 a timer r freq =82k ? ,v out =1.2v, MPQ8612-12 170 ns one-shot on time t on r freq =82k ? ,v out =1.2v, MPQ8612-16, MPQ8612-20 200 ns MPQ8612-12 30 75 150 ns minimum off time t off MPQ8612-16, MPQ8612-20 30 110 160 ns fold back timer (5) t foldback ocp happens 2.5 s over-voltage and under-voltage protection ovp threshold v ovp1 110 120 130 %v ref ovp delay (5) t ovp 1 s uvp threshold (5) v uvp 50 %v ref MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 5 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. electrical characteristics (continued) v in = 5v, t j = -40 to +125 ? c, unless otherwise noted. parameters symbol condition min typ max units reference and soft start t j = -20 ? c to +85 ? c, MPQ8612-12 602 608 614 t j = -20 ? c to +85 ? c, MPQ8612-16, MPQ8612-20 604 610 616 t j = -40 ? c to +125 ? c, MPQ8612-12 599 608 617 reference voltage v ref t j = -40 ? c to +125 ? c, MPQ8612-16, MPQ8612-20 601 610 619 mv feedback current i fb v fb = 608mv 0.001 50 na soft start charging current i ss v ss =0v 5.5 7.5 9 a enable and uvlo enable rising threshold en vth-hi 1.4 1.8 v enable hysteresis en vth-hy 890 mv v en = 2v 1 1.5 2 enable input current i en v en = 0v 0.001 a vcc uvlo vcc under voltage lockout threshold rising vcc vth 2.3 2.8 2.95 v vcc under voltage lockout threshold hysteresis vcc hys 300 mv power good power good rising threshold pg vth-hi 84 90 96 %v ref power good falling threshold pg vth-lo 63 70 73 %v ref power good deglitch timer pg td t ss =1ms, 1.6 2.2 ms power good sink current capability v pg sink 4ma 0.4 v power good leakage current i pg_leak v pg = 3.3v 50 na thermal protection thermal shutdown t sd note 5 150 160 c thermal shutdown hysteresis 25 c note: 5) guaranteed by design. MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 6 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical characteristics performance waveforms are tested on the evaluation board of the design example section. v in =5v, v cc =5v, v out =1.2v, l=1.0h, t a =+25c, unless otherwise noted. 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 -50 -25 0 25 50 75 100 125 150 1000 1050 1100 1150 -50 -25 0 25 50 75 100 125 150 0 2 4 6 8 10 12 14 16 18 -50 0 50 100 150 -50 0 50 100 150 20.50 20.60 20.70 20.80 20.90 21.00 21.10 21.20 21.30 21.40 21.50 -50 -25 0 25 50 75 100 125 150 0 1 2 3 4 5 6 7 8 146 148 150 152 154 156 158 160 162 -50 -25 0 25 50 75 100 125 150 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 -50 -25 0 25 50 75 100 125 150 27 27.2 27.4 27.6 27.8 28 28.2 28.4 -40 0 25 85 125 34.4 34.6 34.8 35 35.2 35.4 35.6 35..8 -40 0 25 85 125 MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 7 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical characteristics (continued) performance waveforms are tested on the evaluation board of the design example section. v in =5v, v cc =5v, v out =1.2v, l=1.0h, t a =+25c, unless otherwise noted. vcc uvlo threshold vs. temperature 2.55 2.60 2.65 2.70 2.75 2.80 2.85 2.90 -50 -25 0 25 50 75 100 125 150 vcc rising threshold vcc falling threshold soft-start/shutdown current vs. temperature en threshold vs. temperature 0.00 0.20 0.40 0.60 0.80 1.00 1.20 1.40 1.60 1.80 -50 -25 0 25 50 75 100 125 150 6.90 6.95 7.00 7.05 7.10 7.15 7.20 7.25 7.30 7.35 7.40 -50 0 50 100 150 en rising threshold en falling threshold reference voltage vs. temperature ovp threshold vs. temperature 606 607 608 609 610 611 612 613 614 615 -50 0 50 100 150 119.5 120.0 120.5 121.0 121.5 122.0 122.5 -50 -25 0 25 50 75 100 125 150 MPQ8612-12 MPQ8612-16 MPQ8612-20 MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 8 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performanc e characteristics (continued) performance waveforms are tested on the evaluation board of the design example section. MPQ8612-12, v in =5v, v cc =5v, v out =1.2v, l=1.0h, t a =+25c, unless otherwise noted. output current (a) output current (a) output current (a) output current (a) output current (a) output current (a) output current (a) output current (a) output current (a) 50 55 60 65 70 75 80 85 90 95 100 0.01 0.1 1 10 100 v in =6v v in =5v v in =4.2v v in =3.3v 60 65 70 75 80 85 90 95 100 0.01 0.1 1 10 100 v in =6v v in =5v v in =4.2v v in =3.3v 60 65 70 75 80 85 90 95 100 0.01 0.1 1 10 100 v in =3.3v v in =4.2v v in =5v v in =6v 65 70 75 80 85 90 95 100 0.01 0.1 1 10 100 v in =6v v in =5v v in =4.2v v in =3.3v 75 80 85 90 95 100 0.01 0.1 1 10 100 v in =4.2v v in =5v v in =6v 50 55 60 65 70 75 80 85 90 95 100 0.01 0.1 1 10 100 v in =4.2v v in =3.3v v in =5v v in =6v 55 60 65 70 75 80 85 90 95 100 0.01 0.1 1 10 100 v in =5v v in =6v v in =4.2v v in =3.3v 60 65 70 75 80 85 90 95 100 0.01 0.1 1 10 100 v in =4.2v v in =5v v in =6v v in =3.3v 65 70 75 80 85 90 95 100 0.01 0.1 1 10 100 v in =4.2v v in =5v v in =6v v in =3.3v MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 9 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performanc e characteristics (continued) performance waveforms are tested on the evaluation board of the design example section. MPQ8612-12, v in =5v, v cc =5v, v out =1.2v, l=1.0h, t a =+25c, unless otherwise noted. 75 80 85 90 95 100 0.01 0.1 1 10 100 -1.00 -0.50 0.00 0.50 1.00 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0 2 4 6 8 10 12 3456 0 200 400 600 800 1000 1200 200 400 600 800 1000 1200 550 570 590 610 630 650 3 3.5 4 4.5 5 5.5 6 0 100 200 300 400 500 600 700 024 681012 MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 10 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performanc e characteristics (continued) performance waveforms are tested on the evaluation board of the design example section. MPQ8612gl-12, v in =5v, v cc =5v, v out =1.2v, l=1.0h, t a =+25c, unless otherwise noted. v sw 200mv/div. v sw 1v/div. dead time (on) i out =12a dead time off i out =12a v sw 5v/div. v in ac coupled 10mv/div. v out ac coupled 20mv/div. i l 2.5a/div. v sw 5v/div. v in ac coupled 10mv/div. v out ac coupled 10mv/div. i l 1a/div. v sw 5v/div. v in ac coupled 100mv/div. v out ac coupled 10mv/div. i l 10a/div. v pg 1v/div. v in 2v/div. v out 1v/div. v pg 2v/div. v in 2v/div. v out 1v/div. v pg 5v/div. v en 5v/div. v out 1v/div. v pg 5v/div. v en 5v/div. v out 1v/div. input/output voltage rippl i out = 0a input/output voltage ripple i out = 0.4a input/output voltage ripple i out = 12a power good through vin start-up i out = 12a power good through vin shutdown i out = 12a power good through en start-up i out = 12a power good through en shutdown i out = 12a MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 11 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performanc e characteristics (continued) performance waveforms are tested on the evaluation board of the design example section. MPQ8612gl-12, v in =5v, v cc =5v, v out =1.2v, l=1.0h, t a =+25c, unless otherwise noted. v out 1v/div. v in 5v/div. v sw 5v/div. i l 1a/div. v out 1v/div. v in 5v/div. v sw 5v/div. i l 10a/div. v out 1v/div. v en 5v/div. v sw 5v/div. i l 2.5a/div. v out 1v/div. v en 5v/div. v sw 5v/div. i l 1a/div. v out 1v/div. v en 5v/div. v sw 5v/div. i l 10a/div. v out 1v/div. v in 5v/div. v sw 5v/div. i l 10a/div. v out 1v/div. v in 5v/div. v sw 2v/div. i l 1a/div. v out 1v/div. v in 5v/div. v sw 5v/div. i l 10a/div. start-up through vin i out = 0a start-up through vin i out = 12a shutdown through vin i out = 0a shutdown through vin i out = 12a start-up through en i out = 0a start-up through en i out = 12a shutdown through en i out = 0a shutdown through en i out = 12a v out ac coupled 200mv/div. i l 5a/div. MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 12 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performanc e characteristics (continued) performance waveforms are tested on the evaluation board of the design example section. MPQ8612gl-12, v in =5v, v cc =5v, v out =1.2v, l=1.0h, t a =+25c, unless otherwise noted. v out 1v/div. v sw 5v/div. i l 10a/div. v out 1v/div. v sw 5v/div. i l 10a/div. v out 1v/div. v sw 5v/div. i l 10a/div. short circuit protection thermal shutdown i out = 12a thermal recovery i out = 12a MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 13 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. pin functions MPQ8612gl-12 pin # name description 1 agnd analog ground. 2 fb feedback. an external resistor divider from t he output to gnd, tapped to the fb pin, sets the output voltage. it is recommended to place t he resistor divider as close to fb pin as possible. vias should be avoided on the fb traces. 3 ss soft start. connect on external capacitor to program the soft start time for the switch mode regulator. 4 en enable pin. pull this pin higher than 1.25v to enable the chip. for automatic start-up, connect en pin to vin with 100k ? resistor. can be used to set the on/off threshold ( adjust uvlo) with two additional resistors. 5 vcc external bias supply voltage for driver and control circuits. for 1.5v to 3v input application, provide vcc with separate 3.3v /5v bias supply. for 3v to 6v input application, provide vcc with separate 3. 3v/5v bias or tie vcc to vin with 10ohm resistor. decouple with a minimum 4.7f ceramic capacitor as close to the pin as possible. x7r or x5r grade dielectric ceramic capacitors are recommended for their stable temperature characteristics. 6 pg power good output, and it is high if the output voltage is higher than 90% of the nominal voltage. there is a delay from fb 90% to pgood goes high. 7 bst bootstrap. a capacitor connected between sw and bs pins is required to form a floating supply across the high-side switch driver. 8-9 gnd system ground. this pin is the reference grou nd of the regulated output voltage. for this reason care must be taken in pcb layout. 10-11 in supply voltage. the in pin supplies power for internal mosfet and regulator. the MPQ8612 operate from a +3v to +6v input rail. an input capacitor is needed to decouple the input rail. use wide pcb traces and mu ltiple vias to make the connection. 12 freq frequency set during ccm operation. a resi stor connected between freq and in is required to set the switching frequency. the on time is determined by the input voltage and the resistor connected to the freq pin. in connect through a resistor is used for line feed-forward and makes the frequency basically constant during input voltage?s variation. recommend a 10pf decoupling capacitor from freq to gnd. 13-14 sw switch output. connect this pin to the inductor and bootstrap capacitor. this pin is driven up to the vin voltage by the high-side switch during the on-time of the pwm duty cycle. the inductor current drives the sw pin negativ e during the off-time. the on-resistance of the low-side switch and the internal scho ttky diode fixes the negative voltage. use wide pcb traces to make the connection. MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 14 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. pin functions (continued) MPQ8612gr-16, MPQ8612gr-20 pin # name description 1 agnd analog ground. 2 fb feedback. an external resistor divider from t he output to gnd, tapped to the fb pin, sets the output voltage. it is recommended to place t he resistor divider as close to fb pin as possible. vias should be avoided on the fb traces. 3 ss soft start. connect on external capacitor to program the soft start time for the switch mode regulator. 4 en enable pin. pull this pin higher than 1.25v to enable the chip. for automatic start-up, connect en pin to vin with 100k ? resistor. can be used to set the on/off threshold ( adjust uvlo) with two additional resistors. 5 vcc external bias supply voltage for driver and control circuits. for 1.5v to 3v input application, provide vcc with separate 3. 3v/5v bias supply. for 3v to 6v input application, provide vcc with separate 3. 3v/5v bias or tie vcc to vin with 10ohm resistor. decouple with a minimum 4.7f ceramic capacitor as close to the pin as possible. x7r or x5r grade dielectric cera mic capacitors are recommended for their stable temperature characteristics. 6 pg power good output, and it is high if the output voltage is higher than 90% of the nominal voltage. there is a delay from fb 90% to pgood goes high. 7 bst bootstrap. a capacitor connected between sw and bs pins is required to form a floating supply across the high-side switch driver. 8-10 gnd system ground. this pin is the reference gr ound of the regulated output voltage. for this reason care must be taken in pcb layout. 11-13 in supply voltage. the in pin supplies power for internal mosfet and regulator. the MPQ8612 operate from a +3v to +6v input rail. an input capacitor is needed to decouple the input rail. use wide pcb traces and mu ltiple vias to make the connection. 14 freq frequency set during ccm operation. a resistor connected between freq and in is required to set the switching frequency. the on time is determined by the input voltage and the resistor connected to the freq pin. in connect through a resistor is used for line feed-forward and makes the frequency basically constant during input voltage?s variation. recommend a 10pf decoupling capacitor from freq to gnd. 15-17 sw switch output. connect this pin to the inducto r and bootstrap capacitor. this pin is driven up to the vin voltage by the high-side switch during the on-time of the pwm duty cycle. the inductor current drives the sw pin negativ e during the off-time. the on-resistance of the low-side switch and the internal schottky diode fixes the negative voltage. use wide pcb traces to make the connection. MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 15 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. block diagram 0.6v 0.3v 0.75v freq vcc en ss fb pg in bst sw gnd agnd rsen hs-fet hs driver ls-fet ls driver current modulator logic current sense amplifer refresh timer oc over-current timer xs xr q pwm bstreg off timer ilim hs limit comparator start on timer loop comparator uv ov uv detect comparator ov detect comparator pgood comparator soft start/stop reference 1meg vcc vcc figure 1?functional block diagram MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 16 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. operation pwm operation the MPQ8612 is fully integrated synchronous rectified step-down switch mode converter. constant-on-time (cot) control is employed to provide fast transient response and easy loop stabilization. at the beginning of each cycle, the high-side mosfet (hs-fet) is turned on when the feedback voltage (v fb ) is below the reference voltage (v ref ), which indicates insufficient output voltage. the on period is determined by the input voltage and the frequency-set resistor as follows: 49 . 0 ) v ( v ) k ( r 8 . 4 ) ns ( t in freq on ? ? ? ? (1) after the on period elapses, the hs-fet is turned off, or becomes off state. it is turned on again when v fb drops below v ref . by repeating operation this way, the converter regulates the output voltage. the integrated low-side mosfet (ls-fet) is turned on when the hs-fet is in its off state to minimize the conduction loss. there will be a dead short between input and gnd if both hs-fet and ls-fet are turned on at the same time. it?s called shoot-through. in order to avoid shoot-through, a dead-time (dt) is internally generated between hs-fet off and ls- fet on, or ls-fet off and hs-fet on. heavy-load operation figure 2?heavy load operation when the output current is high and the inductor current is always above zero amps, it is called continuous-conduction-mode (ccm). the ccm mode operation is shown in figure2. when v fb is below v ref , hs-mosfet is turned on for a fixed interval which is determined by one- shot on- timer as equation 1 shown. when the hs- mosfet is turned off, the ls-mosfet is turned on until next period. in ccm mode operation, the switching frequency is fairly constant and it is called pwm mode. light-load operation with the load decreasing, the inductor current decreases too. when the inductor current touches zero, the operation is transited from continuous-conduction-mode (ccm) to discontinuous-conduction-mode (dcm). the light load operation is shown in figure 3. when v fb is below v ref , hs-mosfet is turned on for a fixed interval which is determined by one- shot on-timer as equation 1 shown. when the hs-mosfet is turned off, the ls-mosfet is turned on until the inductor current reaches zero. in dcm operation, the v fb does not reach v ref when the inductor current is approaching zero. the driver of ls-fet turns into tri-state (high z) whenever the inductor current reaches zero. a current modulator takes over the control of ls-fet and limits the inductor current to less than -1ma. hence, the output capacitors discharge slowly to gnd through ls-fet. as a result, the efficiency at light load condition is greatly improved. at light load condition, the hs- fet is not turned on as frequently as at heavy load condition. this is called skip mode. at light load or no load condition, the output drops very slowly and the MPQ8612 reduce the switching frequency naturally and then high efficiency is achieved at light load. v out v in v sw i out v ref v fb i l current modulator regulates around -1ma t on is constont figure 3?light load operation MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 17 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. as the output current increases from the light load condition, the time period within which the current modulator regulates becomes shorter. the hs-fet is turned on more frequently. hence, the switching frequency increases correspondingly. the output current reaches the critical level when the current modulator time is zero. the critical level of the output current is determined as follows: in out out out sw in (v v ) v i 2l f v ?? ? ?? ? (2) it turns into pwm mode once the output current exceeds the critical level. after that, the switching frequency stays fairly constant over the output current range. switching frequency the selection of switching frequency is a tradeoff between efficiency and component size. low frequency operation increases efficiency by reducing mosfet switching losses, but requires larger inductance and capacitance to maintain low output voltage ripple. for MPQ8612 the on time can be set using freq pin, then the frequency is set in steady state operation at ccm mode. adaptive constant-on-time (cot) control is used in MPQ8612 and there is no dedicated oscillator in the ic. connect freq pin to in pin through resistor r freq and the input voltage is feed- forwarded to the one-shot on-time timer through the resistor r freq . when in steady state operation at ccm, the duty ratio is kept as v out /v in . hence the switching frequency is fairly constant over the input voltage range. the switching frequency can be set as follows: 6 sw freq in delay in out 10 f(khz) 4.8 r (k ) v(v) t(ns) v(v) 0.49 v (v) ? ?? ?? ? (3) where t delay is the comparator delay. it?s about 40ns. generally, the MPQ8612 is set for 300khz to 1mhz application. it is optimized to operate at high switching frequency with high efficiency. high switching frequency makes it possible to utilize small sized lc filter components to save system pcb space. jitter and fb ramp slope figure 4 and figure 5 show jitter occurring in both pwm mode and skip mode. when there is noise in the v fb downward slope, the on time of hs-fet deviates from its intended location and produces jitter. it is necessary to understand that there is a relationship between a system?s stability and the steepness of the v fb ripple?s downward slope. the slope steepness of the v fb ripple dominates in noise immunity. the magnitude of the v fb ripple doesn?t affect the noise immunity directly. figure 4?jitter in pwm mode v slope2 v fb v noise v ref hs driver jitter figure 5?jitter in skip mode ramp with large esr capacitor in the case of poscap or other types of capacitor with lager esr is applied as output capacitor, the esr ripple dominates the output ripple, and the slope on the fb is quite esr related. figure 6 shows an equivalent circuit in pwm mode with the hs-fet off and without an external ramp circuit. turn to application information section for design steps with large esr capacitors. MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 18 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. r1 r2 esr poscap sw vo l fb figure 6?simplified circuit in pwm mode without external ramp compensation to realize the stability when no external ramp is applied, usually the esr value should be chosen as follow: sw on esr out tt 0.7 2 r c ? ?? ? (4) t sw is the switching period. ramp with small esr capacitor when the output capacitors are ceramic ones, the esr ripple is not high enough to stabilize the system, and external ramp compensation is needed. skip to application information section for design steps with small esr caps. r1 r2 ceramic sw fb vo l r4 c4 i r4 i c4 i fb r9 figure 7?simplified circuit in pwm mode with external ramp compensation in pwm mode, an equivalent circuit with hs-fet off and the use of an external ramp compensation circuit (r4, c4) is simplified in figure 7. the external ramp is derived from the inductor ripple current. if one chooses c4, r9, r1 and r2 to meet the following condition: 12 9 sw 4 1 2 rr 11 r 2f c 20rr ?? ? ?? ? ?? ?? ? ? ?? (5) where: r4 c4 fb c4 iiii ? ?? (6) and the ramp on the v fb can then be estimated as: in o 12 ramp on 44 12 9 vv r//r vt rc r//rr ?? ? ??? ?? ?? ?? (7) the downward slope of the v fb ripple then follows: out ramp slope1 off 4 4 v v v trc ? ?? ? (8) as can be seen from equation 8, if there is instability in pwm mode, we can reduce either r4 or c4. if c4 can not be reduced further due to limitation from equation 5, then we can only reduce r4. for a stable pwm operation, the v slope1 should be design follow equation 9. sw on 3 esr out o slope1 out out sw on tt rc 0.7 i 10 0.7 2 vv 2lc t t ? ?? ? ?? ?? ?? ?? ?? ? (9) where io is the load current. in skip mode, the downward slope of the v fb ripple is almost same whether the external ramp is used or not. fig.8 shows the simplified circuit of the skip mode when both the hs-fet and ls- fet are off. r1 r2 cout fb vo ro figure 8?simplified circuit in skip mode the downward slope of the v fb ripple in skip mode can be determined as follows: ref slope2 12 o out v v [(r r ) // r ] c ? ? ?? (10) where ro is the equivalent load resistor. as described in fig.5, v slope2 in the skip mode is lower than that is in the pwm mode, so it is reasonable that the jitter in the skip mode is MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 19 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. larger. if one wants a system with less jitter during ultra light load condition, the values of the v fb resistors should not be too big, however, that will decrease the light load efficiency. soft start/stop the MPQ8612 employs soft start/stop (ss) mechanism to ensure smooth output during power up and power down. when the en pin becomes high, an internal current source (8 a) charges up the ss capacitor c6. the ss capacitor voltage takes over the ref voltage to the pwm comparator. the output voltage smoothly ramps up with the ss voltage. once the ss voltage reaches the same level as the ref voltage, it keeps ramping up while v ref takes over the pwm comparator. at this point, the soft start finishes and it enters into steady state operation. when the en pin is pulled to low, the ss cap voltage is discharged through an 8ua internal current source. once the ss voltage reaches ref voltage, it takes over the pwm comparator. the output voltage will decrease smoothly with ss voltage until zero level. the ss capacitor value can be determined as follows: ss ss ss ref t(ms)i(a) c(nf) v ?? ? (11) if the output capacitors have large capacitance value, it?s not recommended to set the ss time too small. otherwise, it?s easy to hit the current limit during ss. a minimum value of 4.7nf should be used if the output capacitance value is larger than 330 f. pre-bias startup if the output is pre-biased to a certain voltage during startup, the MPQ8612 will disable the switching of both high-side and low-side switches until the voltage on the internal soft-start capacitor exceeds the sensed output voltage at the fb pin. power good (pg) the MPQ8612 has power-good (pg) output. it can be connected to v cc or other voltage source through a resistor (e.g. 100k). when the MPQ8612 is powered on and fb voltage reaches above 90% of ref voltage, the pg pin is pulled high. when the fb voltage drops to 70% of ref voltage or the part is not powered on, the pg pin will be pulled low. over-current protection (ocp) the MPQ8612 enters over-current protection mode when the inductor current hits the current limit, and tries to recover from over-current fault with hiccup mode. that means in over-current protection, the chip will disable output power stage, discharge soft-start capacitor and then automatically try to soft-start again. if the over- current condition still holds after soft-start ends, the chip repeats this operation cycle till over- current disappears and output rises back to regulation level. the MPQ8612 also operates in hiccup mode when short circuit happens. over/under ?voltage protection (ovp/uvp) the MPQ8612 has non-latching over voltage protection. it monitors the output voltage through a resistor divider feedback (fb) voltage to detect over-voltage on the output. when the fb voltage is higher than 120% of the ref voltage (0.608v), the ls-fet will be turned on while the hs-fet will be off. the ls-fet keeps on until it hits the negative current limit and turns off for 100ns. if over voltage condition still holds, the chip repeats this operation cycle till the fb voltage drops below 110% of the ref voltage. when the fb voltage is below 50% of the ref voltage (0.608v), it is recognized as under- voltage (uv). usually, uvp accompanies a hit in current limit and results in ocp. configuring the en control the en pin provides electrical on/off control of the device. set en high to turn on the regulator and low to turn it off. do not float this pin. for automatic start-up, the en pin can be pulled up to input voltage through a resistive voltage divider. choose the values of the pull-up resistor (r up from vin pin to en pin) and the pull-down resistor (r down from en pin to gnd) to determine the automatic start-up voltage: up down in start down rr v1.4 r ? ? ?? (12) MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 20 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. for example, for r up =100k ? and r down =51k ? , the ? in start v is set at 4.15v. to avoid noise, a 10nf ceramic capacitor from en to gnd is recommended. there is an internal zener diode on the en pin, which clamps the en pin voltage to prevent it from running away. the maximum pull up current assuming a worst case 6v internal zener clamp should be less than 1ma. therefore, when en is driven by an external logic signal, the en voltage should be lower than 6v; when en is connected with vin through a pull-up resistor or a resistive voltage divider, the resistance selection should ensure the maximum pull up current less than 1ma. if using a resistive voltage divider and vin higher than 6v, the allowed minimum pull-up resistor r up should meet the following equation: in up down v(v) 6 6 1( m a ) r(k) r (k) ? ?? ?? (13) as a result, when just the pull-up resistor r up is applied, the ? in start v is determined by input uvlo. the value of r up can be get as: in up v(v) 6 r(k) 1( m a ) ? ?? (14) a typical pull-up resistor is 100k ? . uvlo protection the MPQ8612 has under-voltage lock-out protection (uvlo). when the vcc voltage is higher than the uvlo rising threshold voltage, the MPQ8612 will be powered up. it shuts off when the vcc voltage is lower than the uvlo falling threshold voltage. this is non-latch protection. the MPQ8612 is disabled when the vcc voltage falls below its uvlo falling threshold (2.45v). if an application requires a higher under-voltage lockout (uvlo), use the en pin as shown in figure 9 to adjust the input voltage uvlo by using two external resistors. it is recommended to use the enable resistors to set the uvlo falling threshold (v stop ) above 2.8 v. the rising threshold (v start ) should be set to provide enough hysteresis to allow for any input supply variations. en comparator r up r down vcc en MPQ8612 in figure 9?adjustable uvlo thermal shutdown thermal shutdown is employed in the MPQ8612. the junction temperature of the ic is internally monitored. if the junction temperature exceeds the threshold value (minimum 150oc), the converter shuts off. this is a non-latch protection. there is about 25oc hysteresis. once the junction temperature drops to about 125oc, it initiates a soft startup. MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 21 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. application information setting the output voltage-large esr caps for applications that electrolytic capacitor or pos capacitor with a controlled output of esr is set as output capacitors. the output voltage is set by feedback resistors r1 and r2. as figure 10 shows. r1 r2 esr poscap sw vo l fb figure 10?simplified circuit of pos capacitor first, choose a value for r2. r2 should be chosen reasonably, a small r2 will lead to considerable quiescent current loss while too large r2 makes the fb noise sensitive. it is recommended to choose a value within 5k ? - 100k ? for r2, using a comparatively larger r2 when v out is low, and a smaller r2 when v out is high. then r1 is determined as follow with the output ripple considered: out out ref 12 ref 1 vvv 2 rr v ??? ? ?? (15) out v ? is the output ripple determined by equation 21. setting the output voltage-small esr caps r1 r2 ceramic sw fb vo l r9 r4 c4 figure 11?simplified circuit of ceramic capacitor when low esr ceramic capacitor is used in the output, an external voltage ramp should be added to fb through resistor r4 and capacitor c4.the output voltage is influenced by ramp voltage v ramp besides resistor divider as shown in figure 11. the v ramp can be calculated as shown in equation 7. r2 should be chosen reasonably, a small r2 will lead to considerable quiescent current loss while too large r2 makes the fb noise sensitive. it is recommended to choose a value within 5k ? -100k ? for r2, using a comparatively larger r2 when v out is low, and a smaller r2 when v out is high. and the value of r1 then is determined as follow: 2 1 fb( avg) 2 out fb( avg) 4 9 r r v r vv rr ? ? ?? (16) the v fb(avg) is the average value on the fb. v fb(avg) varies with the vin, vo, and load condition, etc.. its value on the skip mode would be lower than that of the pwm mode, which means the load regulation is strictly related to the v fb(avg) . also the line regulation is related to the v fb(avg) ,if one wants to gets a better load or line regulation, a lower v ramp is suggested once it meets equation 9. for pwm operation, v fb(avg) value can be deduced from equation 17. 12 fb(avg) ref ramp 12 9 r//r 1 vv v 2r//rr ??? ? ? (17) usually, r9 is set to 0 ? , and it can also be set following equation 18 for a better noise immunity. it should be set to be 5 timers smaller than r1//r2 to minimize its influence on vramp. 12 9 12 rr 1 r 10 r r ? ?? ? (18) using equation 16 and 17 to calculate the output voltage can be complicated. to simplify the calculation of r1 in equation 16, a dc-blocking capacitor cdc can be added to filter the dc influence from r4 and r9. figure 12 shows a simplified circuit with external ramp compensation and a dc-blocking capacitor. with this capacitor, r1 can easily be obtained by using equation 19 for pwm mode operation. out ref ramp 12 ref ramp 1 vv v 2 rr 1 vv 2 ??? ? ? ?? (19) cdc is suggested to be at least 10 times larger than c4 for better dc blocking performance, and MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 22 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. should be not larger than 0.47uf considering start up performance. in case one wants to use larger cdc for a better fb noise immunity,combined with reduced r1 and r2 to limit the cdc in a reasonable value without affecting the system start up. be noted that even when the cdc is applied, the load and line regulation are still vramp related. r1 r2 ceramic sw fb vo l cdc r4 c4 figure 12?simplified circuit of ceramic capacitor with dc blocking capacitor input capacitor the input current to the step-down converter is discontinuous. therefore, a capacitor is required to supply the ac current to the step-down converter while maintaining the dc input voltage. ceramic capacitors are recommended for best performance. in the layout, it?s recommended to put the input capacitors as close to the in pin as possible. the capacitance varies significantly over temperature. capacitors with x5r and x7r ceramic dielectrics are recommended because they are fairly stable over temperature. the capacitors must also have a ripple current rating greater than the maximum input ripple current of the converter. the input ripple current can be estimated as follows: out out cin out in in vv ii (1 ) vv ?? ?? (20) the worst-case condition occurs at v in = 2v out , where: out cin i i 2 ? (21) for simplification, choose the input capacitor whose rms current rating is greater than half of the maximum load current. the input capacitance value determines the input voltage ripple of the converter. if there is input voltage ripple requirement in the system design, choose the input capacitor that meets the specification the input voltage ripple can be estimated as follows: out out out in sw in in in iv v v(1) fc v v ?? ? ?? ? (22) the worst-case condition occurs at vin = 2vout, where: out in sw in i 1 v 4f c ??? ? (23) output capacitor the output capacitor is required to maintain the dc output voltage. ceramic or poscap capacitors are recommended. the output voltage ripple can be estimated as: out out out esr sw in sw out vv 1 v(1)(r ) fl v 8fc ?? ?? ? ? ??? (24) in the case of ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. the output voltage ripple is mainly caused by the capacitance. for simplification, the output voltage ripple can be estimated as: out out out 2 in sw out vv v(1) v 8f lc ?? ?? ??? (25) the output voltage ripple caused by esr is very small. therefore, an external ramp is needed to stabilize the system. the external ramp can be generated through resistor r4 and capacitor c4 following equation 5, 8 and 9. in the case of poscap capacitors, the esr dominates the impedance at the switching frequency. the ramp voltage generated from the esr is high enough to stabilize the system. therefore, an external ramp is not needed. a minimum esr value around 12m ? is required to ensure stable operation of the converter. for simplification, the output ripple can be approximated as: out out out esr sw in vv v(1)r fl v ?? ?? ? ? (26) inductor the inductor is required to supply constant current to the output load while being driven by the switching input voltage. a larger value MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 23 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. inductor will result in less ripple current and lower output ripple voltage. however, a larger value inductor will have a larger physical size, higher series resistance, and/or lower saturation current. a good rule for determining the inductor value is to allow the peak-to-peak ripple current in the inductor to be approximately 10~30% of the maximum output current. also, make sure that the peak inductor current is below the current limit of the device. the inductance value can be calculated as: out out sw l in vv l(1) fi v ??? ?? (27) where i l is the peak-to-peak inductor ripple current. choose an inductor that will not saturate under the maximum inductor peak current. the peak inductor current can be calculated as: out out lp out sw in vv ii (1 ) 2f l v ?? ?? ?? (28) the inductors listed in table 1 are highly recommended for the high efficiency they can provide. table 1?inductor selection guide part number manufacturer inductance (h) dcr (m ? ) current rating (a) dimensions l x w x h (mm 3 ) switching frequency (khz) fdu1250c-r50m toko 0.50 1.3 46.3 13.3 x 12.1 x5 1000 fdu1250c-r56m toko 0.56 1. 6 42.6 13.3 x 12.1 x5 800-1000 fdu1250c-r75m toko 0.75 1. 7 32.7 13.3 x 12.1 x5 600-800 fdu1250c-1r0m toko 1.0 2.2 31.3 13.3 x 12.1 x5 600 typical design parameter tables the following tables include recommended component values for typical output voltages (1.0v, 1.2v, 1.8v, 3.3v) and switching frequencies (600khz, 800khz, and 1mhz). refer to tables 2-4 for design cases without external ramp compensation and tables 5-7 for design cases with external ramp compensation. external ramp is not needed when high-esr capacitors, such as electrolytic or poscaps are used. external ramp is needed when low-esr capacitors, such as ceramic capacitors are used. for cases not listed in this datasheet, a calculator in excel spreadsheet can also be requested through a local sales representative to assist with the calculation. table 2?c out -poscap, 600khz, 5v in v out (v) l ( h) r1 (k ? ) r2 (k ? ) r7 (k ? ) 1.0 1.0 19.8 30 300 1.2 1.0 29.4 30 365 1.5 1.0 29.4 20 453 1.8 1.0 39.2 20 549 3.3 1.0 44.2 10 1000 table 3?c out -poscap, 800khz, 5vin v out (v) l ( h) r1 (k ? ) r2 (k ? ) r7 (k ? ) 1.0 0.75 20 30 210 1.2 0.75 20 20 270 1.5 0.75 30 20 330 1.8 0.75 39 20 499 3.3 0.75 44.2 10 750 table 5?c out -ceramic, 600khz, 5vin v out (v) l ( h) r1 (k ? ) r2 (k ? ) r4 (k ? ) c4 (pf) r7 (k ? ) 1.0 1.0 21 30 240 470 309 1.2 1.0 33 30 220 470 365 1.5 1.0 51 30 330 390 464 1.8 1.0 45 20 270 470 549 3.3 1.0 62 10 160 680 953 table 6?c out -ceramic, 800khz, 5vin v out (v) l ( h) r1 (k ? ) r2 (k ? ) r4 (k ? ) c4 (pf) r7 (k ? ) 1.0 0.75 21 30 200 470 226 1.2 0.75 34 30 200 470 270 1.5 0.75 34 20 220 470 324 1.8 0.75 47.5 20 225 470 402 3.3 0.75 57.6 10 200 560 750 MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 24 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical application in freq vcc en pgnd bst fb sw mpq 8612gl-12 vin c1a r7 c5 c3 l1 r1 r2 r5 pg agnd ss c6 33nf 22uf c1b 22uf c1c 22uf c1d 0.1uf c1e 22uf c7 10pf 360k 10 r8 r6 100k 4. 7u f 100k r3 0 1uh 29.4k 30k vout c2a c2b 0.1uf 1uf 220uf/20m + figure 13 ? typical application circuit with no external ramp MPQ8612gl- 12, v in =5v, v out =1.2v, i out = 12a, f sw =600khz in freq vcc en pgnd bst fb sw mpq 8612gl-12 vin c1a r7 c5 c3 l1 r4 c4 r1 r2 r5 pg agnd ss c6 33nf 22uf c1b 22uf c1c 22uf c1d 0.1uf c1e 22uf c7 10pf 360k 10 r8 r6 100k 4.7uf 100k r3 0 1uh 220k 470pf 33k 30k r9 0 vout c2a 22uf c2b 22uf c3c 22uf c2d 0.1uf 22uf c2e 1uf figure 14 ? typical application circuit with low esr ceramic capacitor MPQ8612gl- 12, v in =5v, v out =1.2v, i out = 12a, f sw =600khz in freq vcc en pgnd bst fb sw mpq 8612 vin c1a r7 c5 c3 l1 r4 c4 r1 r2 r5 pg agnd ss c6 33nf 22uf c1b 22uf c1c 22uf c1d 0.1uf c1e 22uf c7 10pf 360k 10 r8 r6 100k 4.7uf 100k r3 0 1uh 200k 560pf 29.1k 30k cdc 10nf vout c2a 22uf c2b 22uf c3c 22uf c2d 0.1uf 22uf c2e 1uf figure 15 ? typical application circuit with low esr ceramic capacitor and dc-blocking capacitor . MPQ8612gl- 12, v in =5v, v out =1.2v, i out = 12a, f sw =600khz MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 25 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. layout recommendation 1. four-layer layout is strongly recommended to achieve better thermal performance. 2. place at least 9 vias (10/20mil hole/diameter size) right beneath the ic to get best decoupling effect. 3. place 10 or more vias (10/25mil hole/diameter size) each for input and gnd copper next to the vin and pgnd pin to improve the thermal performance. 4. a 22uf (1206/1210) input cap c1b is required on bottom layer, right beneath the vin/pgnd vias to get best input decoupling effect. 5. if vin/pgnd vias is not allowed beneath the ic, a 22uf input cap with 1206/1210 package (c1c) is required on the top layer as figure17, connecting to vin and pgnd copper directly, within 2mm of the ic edge. 6. a solid pgnd layer is required to place on the first inner layer, right below the ic layer. 7. the high current paths (gnd, in, and sw) should be placed very close to the device with short, direct and wide traces. 8. vcc decoupling capacitor (c5) should be as close to the vcc pin as possible, connect its gnd net to pgnd copper. 9. connect all agnd signals together to agnd pin at first, then kelvin connect agnd to pgnd near the vcc decoupling capacitor(c5) gnd pad on top layer. keep agnd trace 20mil or wider. 10. the external feedback resistors should be placed next to the fb pin. make sure that there is no via on the fb trace and away from the switching node sw. 11. keep the bst voltage path (bst, c3, rbst and sw) as short as possible. 12. keep the vout sense trace away from noise signal, such as sw, vin, etc. put the vout sense point to a stable, quiet output point close to vout cap. in freq vcc en pgnd bst fb sw MPQ8612 v in on/off c1 r freq c5 c3 l1 r4 c4 r1 r2 c2 r3 pg agnd ss v out c6 external v cc supply r bst figure 16?pcb layout c1c <2mm vin pgnd figure 17?vin decouple capacitor MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter MPQ8612 rev. 1.21 www.monolithicpower.com 26 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. package information qfn (3mmx4mm) side view bottom view note: 1) all dimensions are in millimeters. 2) exposed paddle size does not include mold flash. 3) lead coplanarity shall be 0.10 millimeters max. 4) jedec reference is mo-220. 5) drawing is not to scale. pin 1 id marking top view pin 1 id index area recommended land pattern 0.1x45 MPQ8612 D 12a/16a/20a, 6v, synchronous step-down converter notice: the information in this document is subject to change wi thout notice. please contact m ps for current specifications. users should warrant and guarantee that third party intellectual property rights ar e not infringed upon when integrating mps products into any application. mps will not assume any legal responsibility for any said applications. MPQ8612 rev. 1.21 www.monolithicpower.com 27 3/9/2016 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. qfn (4mmx4mm) |
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