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keysight technologies infiniivision mso dynamic probe for xilinx fpgas (n5406a and DSOX4FPGAX, and dsox6fpgax) data sheet figure 1. fpga dynamic probe for xilinx used in conjunction with a keysight infiniivision 6000, 7000, or 4000 or 6000 x-series mso provides an effective solution for simple through complex debugging of systems incorporating xilinx fpgas.
02 | keysight | infiniivision mso dynamic probe for xilinx fpgas (n5406a and DSOX4FPGAX, and dsox6fpgax) - data sheet the challenge you rely on the insight a mso (mixed-signal oscilloscope) provides to understand the behavior of your fpga in the context of the surrounding system. design engineers typically take advantage of the programmability of the fpga to route internal nodes to a small number of physical pins for debugging. while this approach is very useful, it has signifcant limitations. C since pins on the fpga are typically an expensive resource, there are a relatively small number available for debug. this limits internal visibility (i.e. one pin is required for each internal signal to be probed). C when you need to access different internal signals, you must change your design to route these signals to the available pins. this can be time consuming and can affect the timing of your fpga design. C finally, the process required to map the signal names from your fpga design to the mso digital channel labels is manual and tedious. C when new signals are routed out, you need to manually update these signal names on the mso, which takes additional time and is a potential source of confusing errors.
03 | keysight | infiniivision mso dynamic probe for xilinx fpgas (n5406a and DSOX4FPGAX, and dsox6fpgax) - data sheet debug your fpgas faster and more effectively with a mso a better way collaborative development between keysight technologies, inc. and xilinx have produced a faster and more effective way to use your mso to debug fpgas and the surrounding system. the keysight fpga dynamic probe, used in conjunction with a keysight mso, provides the most effective solution for simple through complex debugging. view internal activity with the digital channels on your mso, you are normally limited to measuring signals at the periphery of the fpga. with the fpga dynamic probe, you can now access signals internal to the fpga. you can measure up to 64 internal signals for each external pin dedicated to debug, unlocking visibility into your design that you never had before. make multiple measurements in seconds moving probe points internal to an fpga used to be time consuming. now, in less than a second, you can easily measure different sets of internal signals without design changes. fpga timing stays constant when you select new sets of internal signals for probing. leverage the work you did in your design environment the fpga dynamic probe maps internal signal names from your fpga design tool to your keysight mso. eliminate unintentional mistakes and save hours of time with this automatic setup of signal and bus names on your mso. figure 3. access up to 64 internal signals for each debug pin. signal banks all have identical width (1 to 128 signals wide) determined by the number of device pins you devote for debug. each pin provides sequential access to one signal from every input bank. figure 2. create a timesaving fpga measurement system. insert an atc2 (keysight trace core) core into your fpga design. with the application running on your pc you control which group of internal signals to measure via jtag. pc boar d parallel or usb fpga pr obe outputs on fpga pins sw application can be licensed to a particular pc or particular mso sw application installed on a pc connected to 6000 or 7000 series msos usb lan gpib at c2 insert at c2 cor e with xilinx cor e inserter jt ag xilinx jt ag cabl e selection mux 1-128 1-128 1-128 select 1-128 1-128 to fpga pins change signal bank election via jt ag jt ag
04 | keysight | infiniivision mso dynamic probe for xilinx fpgas (n5406a and DSOX4FPGAX, and dsox6fpgax) - data sheet a quick tour of the application design step 1: create the atc2 core use xilin x core inserter or edk to select your atc2 parameters and to create a debug core that best matches your development needs. parameters include number of pins, number of signal banks, the type of measurement (state or timing), and other atc2 attributes. design step 2: select groups of signals to probe specify banks of internal signals that are potential candidates for mso measurements (using xilinx core inserter or edk). activate fpga dynamic probe for xilinx the fpga dynamic probe application allows you to control the atc2 core and set up the mso for the desired measurements. this application runs on a pc.
05 | keysight | infiniivision mso dynamic probe for xilinx fpgas (n5406a and DSOX4FPGAX, and dsox6fpgax) - data sheet a quick tour of the application (continued) connect your mso to your pc from fpga dynamic probe application software, specify the communication link between your pc and mso. measurement setup step 1: establish a connection between the pc and the atc2 core the fpga dynamic probe application establishes a connection between the pc and a xilinx cable. it also determines what devices are on the jtag scan chain and lets you pick which one you wish to communicate with. core and device names are user defnable. measurement setup step 2: map fpga pins quickly specify how the fpga pins (the signal outputs of atc2) are connected to your mso. select your probe type and rapidly provide the information needed for the mso to automatically track names of signals routed through the atc2 core.
06 | keysight | infiniivision mso dynamic probe for xilinx fpgas (n5406a and DSOX4FPGAX, and dsox6fpgax) - data sheet a quick tour of the application (continued) for atc2 cores with auto setup enabled, each pin of the atc2 core, one at a time, produces a unique stimulus pattern. the instrument looks for this unique pattern on any of its acquisition channels. when the instrument fnds the pattern, it associates that instrument channel with the atc2 output pin producing it. it then repeats the process for each of the remaining output pins eliminating the need to manually enter probe layout information. measurement setup step 3: import signal names tired of manually entering bus and signal names on your mso? the fpga dynamic probe application reads a .cdc fle produced by xilinx core inserter. the names of signals you measure will now automatically show on your mso digital channel labels. setup complete: make measurements quickly change which signal bank is routed to the mso. a single mouse click tells the atc2 core to switch to the newly specifed signal bank without any impact to the timing of your design. to make measurements throughout your fpga, change signal banks as often as needed. user-defnable signal bank names make it straight forward to select a part of your design to measure.
07 | keysight | infiniivision mso dynamic probe for xilinx fpgas (n5406a and DSOX4FPGAX, and dsox6fpgax) - data sheet a quick tour of the application (continued) triggering on valid states msos incorporate logic state triggering for triggering on specifc states. set up a valid state trigger by specifying the clock edge and the desired bus/signal pattern. because the atc2 core outputs both the clock signal and bus values, triggering on the combination ensures your state trigger is valideven though the digital channels are sampling asynchronously. track valid states by measuring the bus value on each falling clock edge for image shown. automatic bus groupings infniivision msos include up to 2 bus groupings. contiguous signal names are automatically grouped and displayed as buses. bus values can be displayed as hex or binary values. additional signals are shown using independent waveforms. correlate internal fpga activity with external measurements view internal fpga activity and time- correlate internal fpga measurements with external analog and digital events in the surrounding system. fpga dynamic probe unlocks the power of the mso for system-level debug with fpgas.
08 | keysight | infiniivision mso dynamic probe for xilinx fpgas (n5406a and DSOX4FPGAX, and dsox6fpgax) - data sheet supported oscilloscopes standalone oscilloscopes infniivision 6000 and 7000 series, and 4000 and 6000 x-series msos mso digital channels 16 bus groupings up to 2, each with 6 character labels triggering capabilities determined by mso, all have state triggering supported xilinx fpga families zynq-7000/7000q, artix-7/7q, kintex-7/7q, virtex-7/7q, virtex-6/6q, virtex-5/5q/5qv, virtex-4/4q/4qv, spartan-6/6q, spartan-3a, 3an, and 3e supported xilinx cables (required) platform cable usb, platform cable ii supported probing mechanisms soft touch (34-channel and 17-channel), mictor, samtec, flying lead, 6000 and 7000 series msos come standard with a 40 pin probe cable and fying leads. cables and probing for mictor, soft touch, or samtec probing must be purchased separately. keysight trace core characteristics number of output signals user defnable: clock line plus 4 to 128 signals in 1 signal increments signal banks user defnable: 1, 2, 4, 8, 16, 32, or 64 modes state (synchronous) or timing (asynchronous) mode fpga resource consumption approximately 1 slice required per input signal to atc2 core consumes no bufgs, dcm or block ram resources. see resource calculator at www.keysight.com/fnd/fpga features with application mouse-click bank select, graphical pin mapping, cdc signal name import, auto-pin mapping, and atc2 "always on" option compatible design tools ise 1 chipscope pro version keysight mso fpga dynamic probe sw version 14.3 or greater 2.60 or greater vivado designs using vivado not currently supported synthesis core inserter produces atc2 cores post-synthesis (pre-place and route) making the cores synthesis independent. atc2 cores produced by core generator are compatible with: C exemplar leonardo spectrum C synopsys design compiler C synopsys design compiler ii C synopsys fpga express C synplicity synplify C xilinx xst additional information available via the internet: www.keysight.com/fnd/fpga and www.keysight.com/fnd/7000-xilinx . ok
09 | keysight | infiniivision mso dynamic probe for xilinx fpgas (n5406a and DSOX4FPGAX, and dsox6fpgax) - data sheet ordering information n5405a fpga dynamic probe for 6000 or 7000 msos C option 001 entitlement certifcate for perpetual node-locked license locked to oscilloscope DSOX4FPGAX dynamic probe for 4000 x-series msos dsox6fpgax dynamic probe for 6000 x-series msos product web site for the most up-to-date and complete application and product information, please visit our product web site at: www.keysight.com/fnd/oscilloscope . keysight technologies oscilloscopes multiple form factors from 20 mhz to > 90 ghz | industry leading specs | powerful applications ordering information
www.axiestandard.org advancedtca ? extensions for instrumentation and test (axie) is an open standard that extends the advancedtca for general purpose and semiconductor test. keysight is a founding member of the axie consortium. atca ? , advancedtca ? , and the atca logo are registered us trademarks of the pci industrial computer manufacturers group. www.lxistandard.org lan extensions for instruments puts the power of ethernet and the web inside your test systems. keysight is a founding member of the lxi consortium. www.pxisa.org pci extensions for instrumentation (pxi) modular instrumentation delivers a rugged, pc-based high-performance measurement and automation system. 10 | keysight | infiniivision mso dynamic probe for xilinx fpgas (n5406a and DSOX4FPGAX, and dsox6fpgax) - data sheet
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