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  r08d s01 23ej 01 00 rev.1.0 0 page 1 of 18 jun 27, 2014 1. v dd 1 2. v in+ 3. v in ? 4. gnd1 5. gnd2 6. v out ? 7. v out+ 8. v dd 2 pin connection (top view) 1 2 43 6 5 8 7 shield + ? + ? preliminary data sheet ps8551al4 analog output type optical coupled isolation amplifier description t he ps8551al4 is an optical ly c oup led isolation ampli fier that uses an ic wi th a hi gh-ac cu ra cy si gma-de lta a/d converter and a gaaias light-emitting di od e wi th hi gh-speed resp on se a nd hi gh luminan ce efficien cy on the in put side, and an ic with a hi gh -accu racy d/a conv er ter on the ou tput side . t he ps8551a l4 is de sig ne d s pe cifically for high common m ode trans ie nt immuni ty (cmt i) and hi gh lin ea ri ty (n on- lin ea ri ty ). t he ps855 1a l4 is desi gned for current and volt age se nsin g. features ? non-l ine ari ty ( nl2 00 = 0.35% max .) ? high comm on mode trans ien t immuni ty (cmti = 10 kv/ s min.) ? high is olati on vo lta ge (bv = 5 000 vr.m.s.) ? gain toler ance (g = 7.92 to 8.08 ( 1%)) gain: 8 v/v typ. ? packa ge: 8-pi n dip lead bend ing ty pe (gu ll-wi ng) for lo ng creep age di stan ce for surface mount ( l4) ? emboss ed ta pe prod uct: ps8551a l4-e3: 1 000 pcs/r eel ? pb-f ree pr oduct ? safe ty stan dar ds ? ul ap prov ed: no. e72 422 ? csa appr oved : no. ca 10139 1 (ca5a, can/ csa-c22 .2 60 065, 60950) ? semko appr oved (en6 006 5, en609 50) ? din e n60 747 -5-5 (v de0 884 -5) app rov ed (opt ion) applications ? ac servo, inverter ? solar power co nditio ner ? measurem ent equi pm ent r08ds0123ej0100 rev.1.00 jun 27, 2014
ps8551al4 chapter title r08ds0123ej0100 rev.1.00 page 2 of 18 jun 27, 2014 package dimensions (unit: mm) lead bending type (gull-wing) for long creepage distance for surface mount (l4) 9.25 +0.5 ?0.25 6.5 +0.5 ?0.1 10.05 0.4 0.620.25 0.20.15 3.70.35 3.50.2 1.01 +0.4 ?0.2 2.54 0.50.15 photocoupler construction parameter unit (min.) air distance 8 mm outer creepage distance 8 mm isolation distance 0.4 mm
ps8551al4 chapter title r08ds0123ej0100 rev.1.00 page 3 of 18 jun 27, 2014 marking example r 8551a nt131 no. 1 pin mark 1 31 year assembled (last 1 digit) t n rank code in-house code (t: pb-free) week assembled assembly lot type number company initial ordering information part number order number solder plating specification packing style safety standard approval application part number * 1 ps8551al4 ps8551al4-ax pb-free magazine case 50 pcs standard products ps8551al4 ps8551al4-e3 ps8551al4-e3-ax (ni/pd/au) embossed tape 1 000 pcs/reel (ul, csa, semko approved) ps8551al4-v PS8551AL4-V-AX magazine case 50 pcs ul, csa, semko, ps8551al4-v-e3 ps8551al4-v-e3-ax embossed tape 1 000 pcs/reel din en60747-5-2 (vde0884-5) approved *1 fo r the application of the safety standard, following part number should be used.
ps8551al4 chapter title r08ds0123ej0100 rev.1.00 page 4 of 18 jun 27, 2014 absolute maximum ratings (t a = 25 c, unless otherwise specified) parameter symbol ratings unit operating ambient temperature t a 40 to 105 c storage temperature t stg 55 to 125 c supply voltage v dd 1, v dd 2 0 to 5.5 v input voltage v in + , v in ? 2 to v dd 1 0.5 v 2 seconds transient input voltage v in + , v in ? 6 to v dd 1 0.5 v output voltage v out + , v out? 0.5 to v dd 2 0.5 v isolation voltage *1 bv 5 000 vr.m.s. *1 ac voltag e for 1 minute at t a = 25 c, rh = 60% between input and output. pins 1-4 shorted together, 5-8 shorted together. recommended operating conditions parameter symbol min. max. unit operating ambient temperature t a ?40 105 c supply voltage v dd 1, v dd 2 4.5 5.5 v input voltage (accurate and linear) *1 v in + , v in ? ?200 200 mv *1 using v in ? = 0 v (to be connected to gnd1) is recommended. avoid using v in ? of 2.5 v or more, because the internal test mode is activated when the voltage v in ? reaches more than 2.5 v.
ps8551al4 chapter title r08ds0123ej0100 rev.1.00 page 5 of 18 jun 27, 2014 electrical characteristics (dc characteristics) (typ.: t a = 25 c, v in + = v in? = 0 v, v dd 1 = v dd 2 = 5 v, min., max.: refer to recommended operat ing conditions, unless otherwise specified) parameter symbol conditions min. typ. max. unit input offset voltage v os t a = 25 c ? 2 ? 0.25 2 mv ? 3 ? 0.25 3 input offset voltage drift vs. temperature ? dv os /dt a ? 1.6 10 v/ c gain *1 g ?200 mv v in + 200 mv, t a = 25 c 7.92 8 8.08 v/v gain drift vs. temperature ? dg/dt a ? 0.0006 v/v c v out non-linearity (200 mv) *2 nl200 ?200 mv v in + 200 mv 0.014 0.35 % v out non-linearity (200 mv) drift vs. temperature ? dnl200/dt a ? 0.0001 %/ c v out non-linearity (100 mv) *2 nl100 ?100 mv v in + 100 mv 0.011 0.2 % maximum input voltage before v out clipping ? v in + ? max. 320 mv input supply current i dd 1 v in + = 400 mv 13.5 16 ma output supply current i dd 2 v in + = ? 400 mv 7.8 16 ma input bias current i in + v in + = 0v ? 1 ? 0.65 1 a input bias current drift vs. temperature ? di in + /dt a ? 0.3 na/ c low level saturated output voltage v ol v in + = ? 400 mv 1.29 v high level saturated output voltage v oh v in + = 400 mv 3.8 v output voltage (v in + = v in ? = 0 v) v ocm v in + = v in ? = 0 v 2.2 2.55 2.8 v output short-circuit current ? i osc ? 20 ma equivalent input resistance r in 450 k v out output resistance r out 4 input dc common-mode rejection ratio *3 cmrr in 76 db *1 t he differential output voltage (v out+ ? v out ? ) with respect to the differential input voltage (v in+ ? v in ? ), where v in+ = ? 200 mv to 200 mv and v in ? = 0 v) is measured under the circuit shown in fig. 2 nl200, g test circuit . upon the resulting chart, the gain is defined as the slope of the optimum line obtained by using the method of least squares. *2 the differential output voltage (v out+ ? v out ? ) with respect to the differential input voltage (v in+ ? v in ? ) is measured under the circuit shown in fig. 2 nl200, g test circuit . upon the resulting chart, the optimum line is obtained by using the method of least squares. non-linearity is defined as the ratio (%) of the optimum line obtained by dividing [half of the peak to peak value of the (residual) deviation] by [full-scale differential output voltage]. for example, if the differential output vo ltage is 3.2 v, and the peak to peak val ue of the (residual) deviation is 22.4 mv, while the input v in+ is 200 mv, the output non-linearity is obtained as follows: nl200 = 22.4/(2 3 200) = 0.35% *3 cmrr in is defined as the ratio of the differential signal gain (when the differential signal is applied between the input pins) to the common-mode signal gain (when both input pins are connected and the signal is applied). this value is indicated in db.
ps8551al4 chapter title r08ds0123ej0100 rev.1.00 page 6 of 18 jun 27, 2014 electrical characteristics (ac characteristics) (typ.: t a = 25 c, v in + = v in? = 0 v, v dd 1 = v dd 2 = 5 v, min., max.: refer to recommended operatin g conditions, unless otherwise specified) parameter symbol conditions min. typ. max. unit v out bandwidth ( ? 3 db) f c v in + = 200 mv p-p , sine wave 50 100 khz v out noise n out v in + = 0 v 15.6 mvr.m.s. v in to v out signal delay (50 to 10%) t pd10 v in + = 0 to 150 mv step 2.4 3.3 s v in to v out signal delay (50 to 50%) t pd50 4.2 5.6 v in to v out signal delay (50 to 90%) t pd90 6.1 9.9 v out rise time/fall time (10 to 90%) t r /t f v in + = 0 to 150 mv step 3.1 6.6 s common mode transient immunity *1 cmti v cm = 0.5 kv, t r = 20 ns, t a = 25 c 10 28 kv/ s power supply noise rejection *2 psr f = 1 mhz 40 mvr.m.s. *1 cmt i is tested by applying a pulse that rises and falls suddenly (v cm = 0.5 kv) between gnd1 on the input side and gnd2 on the output side (pins 4 and 5) by using the circuit shown in fig. 9 cmti test circuit . cmti is defined at the point where the differential output voltage (v out+ ? v out ? ) fluctuates 200 mv (>1 s) or more from the average output voltage. *2 this is the value of the transient vo ltage at the differential output when 1 v p-p , 1 mhz, and 40 ns rise/fall time square wave is applied to both v dd 1 and v dd 2.
ps8551al4 chapter title r08ds0123ej0100 rev.1.00 page 7 of 18 jun 27, 2014 test circuit fig. 1 v os test circuit fig. 2 nl200, g test circuit fig. 3 i dd 1 test circuit fig. 4 i dd 2 test circuit v dd1 v dd2 10 k 10 k 0.1 f shield + ? + ? 0.1 f 0.47 f 0.47 f v out +15 v ?15 v 0.1 f 0.1 f ad624cd (x100) v dd1 v in v dd2 10 k 10 k 0.1 f shield + ? + ? 0.1 f 0.47 f 0.01 f 0.47 f 0.47 f 10 k 13.2  404  +15 v ?15 v 0.1 f 0.1 f ad624cd (x4) v out +15 v ?15 v 0.1 f 0.1 f ad624cd (x10) 1 2 3 4 8 7 6 5 1 2 3 4 8 7 6 5 0.01 f shield + ? + ? 1 5 v i dd 1 400 mv 2 3 4 8 7 6 5 0.1 f 0.01 f shield + ? + ? 1 5 v ? 400 mv 2 3 4 8 7 6 5 0.1 f 0.1 f 5 v i dd 2 ? + ? + ? +
ps8551al4 chapter title r08ds0123ej0100 rev.1.00 page 8 of 18 jun 27, 2014 fig. 5 i in+ test circuit fig. 6 v out test circuit v ol v ocm v oh 0.01 f shield + ? + ? 1 ? 400 mv 2 3 4 8 7 6 5 0.1 f 0.1 f 5 v 5 v 0.01 f shield + ? + ? 1 5 v i in+ 2 3 4 8 7 6 5 0.1 f v ol 0.01 f shield + ? + ? 1 2 3 4 8 7 6 5 0.1 f 0.1 f 5 v 5 v v ocm 0.01 f shield + ? + ? 1 400 mv 2 3 4 8 7 6 5 0.1 f 0.1 f 5 v 5 v v oh
ps8551al4 chapter title r08ds0123ej0100 rev.1.00 page 9 of 18 jun 27, 2014 fig. 7 |i osc | test circuit fig. 8 t pd test circuit fig. 9 cmti test circuit v dd1 v in v dd2 2 k 10 k 2 k 0.1 f shield + ? + ? 0.1 f 0.01 f +15 v ?15 v 0.1 f 0.1 f ne5534 v out 1 2 3 4 8 7 6 5 i osc 0.01 f shield + ? + ? 1 2 3 4 8 7 6 5 0.1 f 0.1 f 5 v 9 v 78l05 5 v i osc 0.01 f shield + ? + ? 1 2 3 4 8 7 6 5 0.1 f 0.1 f 5 v 5 v 10 k v dd2 2 k 2 k 0.1 f 0.1 f shield + ? + ? 0.1 f pc813 v out 1 2 3 4 8 7 6 5 10 k 150 pf 10 k 150 pf in out v cm +15 v ?15 v ?+ 0.1 f 0.1 f + ? + ?
ps8551al4 chapter title r08ds0123ej0100 rev.1.00 page 10 of 18 jun 27, 2014 typical characteristics (t a = 25 c, unless otherwise specified) 3.0  2.0  1.0  0.0 ?  1.0 ?  2.0 ? 3.0 4.5 4.75 5 5.25 5.5 ? 50 ? 25 0 25 50 75 100 125 ? 50 ? 25 0 25 50 75 125100 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0.00 non-linearity nl200 (%) 2.0 1.5 1.0 0.5 0.0 ? 0.5 ? 1.0 ? 1.5 ? 2.0 8.2 8.1 8.0 7.9 7.8 8.2 8.1 8.0 7.9 7.8 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0.00 v dd 1 = v dd 2 = 5 v v in+ = ? 200 mv to + 200 mv, v in- = 0 v v dd 1 = v dd 2 = 5 v v in+ = ? 200 mv to + 200 mv, v in- = 0 v v dd 1 = v dd 2 = 5 v v in+ = v in- = 0 v v in+ = v in- = 0 v v in+ = ? 200 mv to + 200 mv, v in- = 0 v v in+ = ? 200 mv to + 200 mv, v in- = 0 v ? 50 ? 25 0 25 50 75 125100 4.5 4.75 5 5.25 5.5 4.5 4.75 5 5.25 5.5 input offs e t volt a ge vs. ambient temperature ambient temperature t a ( c) input offset voltage v os (mv) input offset v o lt a ge vs. supply voltage supply voltage v dd 1, v dd 2 (v) input offset voltage v os (mv) gain vs. ambient temperature ambient temperature t a ( c) gain g (v/v) non-linearity vs. ambient temperature ambient temperature t a ( c) non-linearity nl200 (%) gain vs. supply voltage supply voltage v dd 1, v dd 2 (v) gain g (v/v) non-linearity vs. supply voltage supply voltage v dd 1, v dd 2 (v) remark t he graphs indicate nominal characteristics.
ps8551al4 chapter title r08ds0123ej0100 rev.1.00 page 11 of 18 jun 27, 2014 4 3.5 3 2.5 2 1.5 1 4.5 4.75 5 5.25 5.5 10 100 1 000 10 000 100 000 1 000 000 input voltage v in+ (v) input voltage v in (v) frequency f (hz) output voltage v o (v) supply current i dd (ma) input voltage v in+ (v) input current i in+ (a) gain g v (db) frequency f c ? 3 db (hz) supply voltage v dd 1, v dd 2 (v) ambient temperature t a ( c) frequency f c ? 3 db (hz) 16 14 12 10 8 6 4 2 0 3 2 1 0 ? 1 ? 2 ? 3 1 0 ? 1 ? 2 ? 3 ? 4 ? 5 ? 6 ? 7 ? 8 120 100 80 60 40 20 0 120 100 80 60 40 20 0 v dd 1 = v dd 2 = 5 v v in- = 0 v v dd 1 = v dd 2 = 5 v, v in- = 0 v v in+ = 200 mv p-p sine wave v dd 1 = v dd 2 = 5 v, v in- = 0 v v in+ = 200 mv p-p sine wave v dd 1 = v dd 2 = 5 v, v in- = 0 v v in+ = 200 mv p-p sine wave v dd 1 = v dd 2 = 5 v v dd 1 = v dd 2 = 5 v v out+ i dd 2 i dd 1 v out ? ? 0.4 ? 0.2 0 0.2 0.4 ? 0.4 ? 0.2 0 0.2 0.4 ? 0.4 ? 0.2 0 0.2 0.4 125 100 ? 50 ? 25 0 25 75 50 output voltage vs. input voltage supply curre n tvs.inp u t volt a ge input current vs. input voltage frequency vs. ambient temperature gain vs. frequency frequency vs. supply voltage remark the graphs indicate nominal characteristics.
ps8551al4 chapter title r08ds0123ej0100 rev.1.00 page 12 of 18 jun 27, 2014 7 6 5 4 3 2 1 0 ? 50 ? 25 0 25 50 75 100 125 signal del a ytime vs. ambient temperature ambient temperature t a ( c) signal delay time pd ( s) t pd10 t f t r t pd50 t pd90 v dd 1 = v dd 2 = 5 v, v in- = 0 v v in+ = 0 to 150 mv step remark t he graphs indicate nominal characteristics.
ps8551al4 chapter title r08ds0123ej0100 rev.1.00 page 13 of 18 jun 27, 2014 taping specifications (unit: mm) outline and dimensions (tape) 1.550.1 2.00.1 4.00.1 1.750.1 4.65 max. 9.950.1 12.00.1 1.5 +0.1 ?0 7.50.1 10.550.1 16.00.3 4.20.1 0.30.05 outline and dimensions (reel) packing: 1 000 pcs/reel 3302.0 1001.0 2.00.5 13.00.2 r 1.0 21.00.8 2.00.5 21.51.0 17.51.0 tape direction ps8551al4-e3
ps8551al4 chapter title r08ds0123ej0100 rev.1.00 page 14 of 18 jun 27, 2014 recommended mount pad dimensions (unit: mm) d c b a part number ps8551al4 lead bending a lead bending type (gull-wing) for surface mount 9.0 b 2.54 c 1.7 d 2.0
ps8551al4 chapter title r08ds0123ej0100 rev.1.00 page 15 of 18 jun 27, 2014 notes on handling 1. recommended soldering conditions (1) infrared reflow soldering ? peak reflow temperature 260 c or below (package surface temperature) ? time of peak reflow temperature 10 seconds or less ? time of temperature higher than 220 c 60 seconds or less ? time to preheat temperature from 120 to 180 c 120 30 s ? number of reflows three ? flux rosin flux containing small amount of chlorine (the flux with a maximum chlorine content of 0.2 wt% is recommended.) 12030 s (preheating) 220 (2) wave soldering ? temperature 260 c or below (molten solder temperature) ? time 10 seconds or less ? preheating conditions 120 c or below (package surface temperature) ? number of times one (allowed to be dipped in solder including plastic mold portion.) ? flux rosin flux containing small amount of chlorine (the flux with a maximum chlorine content of 0.2 wt% is recommended.) (3) soldering by soldering iron ? peak temperature (lead part temperature) 350 c or below ? time (each pins) 3 seconds or less ? flux rosin flux containing small amount of chlorine (the flux with a maximum chlorine content of 0.2 wt% is recommended.) (a) soldering of leads should be made at the poi nt 1.5 to 2.0 mm from the root of the lead
ps8551al4 chapter title r08ds0123ej0100 rev.1.00 page 16 of 18 jun 27, 2014 (4) ca utions ? fluxes avoid removing the residual flux with freon-based and chlorine-based cleaning solvent. 2. cautions regarding noise be aware that when voltage is applied suddenly between the photocoupler?s input and output at startup, the output transistor may enter the on state, even if the voltage is within the absolute maximum ratings. usag e cautions 1. this product is weak for static electricity by designed wi th high-speed integrated circuit so protect against static electricity when handling. 2. board designing (1) by-pass capacitor of more than 0.1 f is used between v cc and gnd near device. also, ensure that the distance between the leads of the photocouple r and capacitor is no more than 10 mm. (2) keep the pattern connected the input (v in+ , v in- ) and the output (v out+ , v out- ), respectively, as short as possible. (3) do not connect any routing to the portion of t he frame exposed between the pins on the package of the photocoupler. if connected, it will affect the photocoupler's internal voltage and the photocoupler will not operate normally. (4) because the maximum frequency of the signal input to the photocoupler must be lower than the allowable frequency band, be sure to connect an anti-a liasing filter (an rc filter with r = 68 and c = 0.01 f, for example). (5) the signals output from the ps8551a include noise el ements such as chopping noise and quantization noise generated internally. therefore, be sure to restrict t he output frequency to the required bandwidth by adding a low-pass filter function (an rc filter with r =10 k and c = 150 pf, for example) to the operational amplifier (post amplifier) in the next stage to the ps8551a. (6) when the primary power supply (v dd 1) is off and only the secondary power supply (v dd 2) is being applied (v dd 1 = 0 v and v dd 2 = 5 v), v out+ outputs a low level, and v out ? outputs a high level (v out+ = 1.3 v typ., v out? = 3.8 v typ.), regardless of the input voltages (v in+ and v in ? ). (7) the output level of v out+ and v out ? might be unstable for several seconds immediately after the secondary power supply (v dd 2) is applied while the primary power supply (v dd 1) is being applied. 3. avoid storage at a high temperature and high humidity.
ps8551al4 chapter title r08ds0123ej0100 rev.1.00 page 17 of 18 jun 27, 2014 specification of vde marks license document parameter symbol spec. unit climatic test class (iec 60068-1/din en 60068-1) 40/105/21 dielectric strength maximum operating isolation voltage test voltage (partial discharge test, procedure a for type test and random test) u pr = 1.5 u iorm , p d < 5 pc u iorm u pr 1 130 1 695 v peak v peak test voltage (partial discharge te st, procedure b for all devices) u pr = 1.875 u iorm , p d < 5 pc u pr 2 119 v peak highest permissible overvoltage u tr 8 000 v peak degree of pollution (din en 60664-1 vde0110 part 1) 2 comparative tracking index (iec 60112/din en 60112 (vde 0303 part 11)) cti 175 material group (din en 60664-1 vde0110 part 1) iii a storage temperature range t stg ?55 to +125 c operating temperature range t a ?40 to +105 c isolation resistance, minimum value v io = 500 v dc at t a = 25c v io = 500 v dc at t a max. at least 100c ris min. ris min. 10 12 10 11 safety maximum ratings (maximum permi ssible in case of fault, see thermal derating curve) package temperature current (input current i f , psi = 0) power (output or total power dissipation) isolation resistance v io = 500 v dc at t a = tsi tsi isi psi ris min. 175 400 700 10 9 c ma mw
ps8551al4 chapter title r08ds0123ej0100 rev.1.00 page 18 of 18 jun 27, 2014 caution gaas products this product uses gallium arsenide (gaas). gaas vapor and powder are hazardous to human health if inhaled or ingested, so please observe the following points. ? follow related laws and ordinances when disposi ng of the product. if there are no applicable laws and/or ordinances, dispose of the product as recommended below. 1. commission a disposal company able to (with a license to) collect, transport and dispose of materials that contain arsenic and other such industrial waste materials. 2. exclude the product from general industrial waste and household garbage, and ensure that the product is controlled (as industrial waste subjec t to special control) up until final disposal. ? do not burn, destroy, cut, crush, or chemically dissolve the product. ? do not lick the product or in any w ay allow it to enter the mouth.
all trademarks and re gistered trademarks are t he property of their respective owners. c - 1 revision history ps8551al4 data sheet rev . date description page summary 1.00 jun 27, 2014 ? first edition issued
notice 1. descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. you are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. california eastern laboratories and renesas electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 2. california eastern laboratories has used reasonable care in preparing the information included in this document, but california eastern laboratories does not warrant that such information is error free. california eastern laboratories and renesas electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein. 3. california eastern laboratories and renesas electronics do not assume any liability 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