aic 341 2 low iq high light load efficiency synchronous boost converter analog integrations corporation 3a1, 1 lih sin 1st rd., science park, hsinchu 300, taiwan, r.o.c. ds-3412g-03 20141105 tel: 886-3-5772500 fax: 886-3-5772510 www.analog.com.tw 1 ? features ? deliver 3.3v at 60 ma from a single alk a- line/ni - mh or 3.3v at 12 0ma from two cells ? up to 94% efficiency ? low shutdown current: < 1 a ? low quiescent current : 12 a. ? low no - load input current (see typical perfo r- mance characteristics for detail ) ? output disconnect by shutdown function ? small sot 23 -6 package ? applications ? wireless mice ? medical instruments ? smart phones ? bluetooth devices ? description the aic 341 2 is a synchronous step - up dc/dc co n- verter. that i s base on constant off time/psm co n- troller topology . the ic enters psm mode automatically at light load, the goal is to i mprove e fficiency and r e- duce quiescent current. the aic 341 2 provide a co m- plete power supply solution for products powered b y one or two alkaline, ni - cd, or ni - mh battery cells. it stays in operation with supply v oltages down to 0. 7 v. the implemented boost converter is based on a co n- stant off time/psm controller topology using a n inte r- nal synchronous rectifier to obtain maximum efficiency. a low - emi mode is implemented to reduce ringing and in effect lower radiated electromagnetic energy when the converter enters the discontinuous conduction mode. ? typical application circuit s fig. 1 one cell step - up dc/dc converter
AIC3412 2 ? ordering information example: aic341 2 gg6tr ? in sot - 23 - 6 green package & taping & reel packing type packing type tr: tape & reel bg: bag package type g6: sot - 2 3 - 6 g : green package aic 341 2 x xx x x pin configuration sot - 2 3 - 6 (g6) top view note: pin1 is determined by orienting the package marking as shown. gnd sw 3 2 1 4 vin 6 shdn fb 5 vout aic 341 2 ? absolute maximum ratin gs pin voltage : fb, shdn , out, vin - 0.3 v to 6v pin voltage: sw dc - 0.3 v to 6v pulsed < 100ns - 0.3 v to 7v operating ambient temperature range t a -40 c to 8 5 c operating maximum junction temperature t j 150 c storage temperature range t stg - 65 c to 150 c lead temperature ( soldering 10 sec.) 260 c thermal resistance junction to ambient 250 c/ w (assume no ambient airflow, no heatsink) absolute maximum ratings are those values beyond which the life of a device may be impaired. ? test circuit fig. 2 test circuit
AIC3412 3 ? electrical characteristics ( typical application circuit, and the ambient temperature= 25 c, v in =1.2v, v out =3.3v, u nless otherwise specified) (note1) parameter test condition symbol min typ max unit output vo ltage range v out 1.65 5 .5 v minimum s tart up voltage rl= 3.3 k ohm 0.75 0.9 v input operation voltage 0. 7 5 v uvlo of vin vin decreasing 0.5 0.7 v quiescent current (psm) v out v in =1.2v, v out =3.3v, v fb =0.55v ( note 2) i q 12 25 a ic shut down current shdn = 0v, v out =1.1v i sd 0.01 1 a feedback voltage v fb 490 500 510 mv fb input leakage current v fb =1.3v i fb 1 50 na inductor current ripple i lh 200 ma constant off time v in =1.2v, v out =3.3v t off 400 ns line regulation v in AIC3412 4 ? typical performance characteristics f ig. 3 effici ency vs. output current fig . 4 efficiency vs. output current f ig. 5 output voltage vs. output current fig . 6 output voltage vs. output current f ig . 7 output voltage vs. output current fig . 8 output voltage vs. output current
AIC3412 5 ? typical performance characteristics(continued) f ig . 9 input supply current vs. supply voltage f ig . 10 output current vs. supply voltage f ig . 11 load t ransient fig . 12 s tart up and s hutdown f ig . 13 output voltage ripple 2v/div. 20mv/div. 10mv/div. 1.2vin/ 3.3vout iout= 10ma~ 70ma v out i out 1.2vin/ 3.3vout, iout= 10ma v out, ripple i lx 50ma/div. 50ma/div. 2v/div. 100ma/div.
AIC3412 6 ? functional block diagram ? pin descriptions 1. sw - switch pin. connect inductor between vin and this pin. 2. gnd - signal and power g round 3. shdn - logic controlled shutdown input. shdn = high: normal operation shdn = low: ic shutdown 4. fb - feedback input to error amplifier. connect resistor divider tap to this pin. 5. vout - output voltage sense and drain of the internal synchronous rectifier. 6. vin - input supply pin.
AIC3412 7 ? application information the aic341 2 is a synchronous step - up dc - dc co n- verter . it is based on constant off time/psm controller topology . at the beginning of each clock cycle, the main switch (nmos) is turned on and the inductor current starts to ramp. after the sense current signal equals the error amplifier (ea) output, the main switch is turned off and the synchronous switch (pmos) is turned on. the device can op erate with an input voltage below 1v; the typical start - up voltage is 0. 75 v. current limit the over current protection is to limit the switch current. the output voltage will be dropped when over current is happened. the current limit amplifier will turn off switch once the current exceeds its threshold. zero current comparator the zero current comparator monitors the inductor current to the output and shuts off the synchronous rectifier, this prevents the inductor current from r e- versing in polarity improving efficiency at light loads. device shutdown when shdn is set logic high, the aic341 2 is put into active mode operation. if shdn is set logic low, the device is put into shutdown mode and consumes less than 1a of current. at the shutdown mode, the sy n- chronous switch will turn off and the output voltage of AIC3412 step - up converter will reduce to 0v. after start - up, the internal circuitry is supplied by v out , however, if shutdown mode is enabled, the internal circuitry will be supplied by the input source again. adjustable output voltage an external resistor divider is used to set the output voltage. the output voltage of the switching regulator (v out ) is determined by the following equation: ? ? 1 ? u 2 1 fb out r r 1vv where v fb is 0.5v reference voltage. input inductor selection a 2.2 h~ 6.8 h input inductor is commanded for most aic34 12 applications. the 4.7 p h input i nductor can get the good performance over the whole converter ratio cases . the induct or which is smaller than 2.2 p h is not recommended to use . it is important to ensure the i n- ductor saturation current exceeding the peak inductor current in application to prevent core saturation. input capacitor selection surfaces mount 4.7f or greater, x5r or x7r, ceramic capacitor is suggested for the input capacitor. the input capacitor provides a low impedance loop for the edges of pulsed current drawn by the aic341 2 . low esr/esl x7r and x5r ceramic capacitors are ideal for this function. to minimize stray inductance, the capacitor should be placed as close as possible to the ic. this keeps the high frequency content of the input current localized, minimizing emi and input voltage ripple. a l- ways examine the ceramic capacitor dc voltage coe f- ficient characteristics to get the proper value. output capacitor selection the output capacitor limits the output ripple and pr o- vides holdup d uring large load transitions. a 4.7f to 10f, x5r or x7r, ceramic capacitor is suggested for the output capacitor. typically the recommended c a- pacitor range provides sufficient bulk capacitance to stabilize the output voltage during large load transitions and has the low esr and esl characteristics nece s- sary for low output voltage ripple. pcb layout guidance this is a considerably high frequency for dc - dc co n- verters. pcb layout is important to guarantee satisfa c-
AIC3412 8 tory performance. it is recommended to make traces of the power loop, especially where the switching node is involved, as short and wide as possible. first of all, the inductor, input and output capacitor should be as close as possible to the device. feedback and shutdown circuits should avoid the proximity of large ac signals involving the power inductor and switching node.
AIC3412 9 ? p hysical dimensions ? sot -23-6 note : information provided by aic is believed to be accurate and reliable. however, we cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an aic product; nor for any infringement of patents or other rights of third parties that may result from its use. we reserve the right to change the circuitry and specifications without notice. life support policy: aic does not authorize any aic product for use in life support devices and/or systems. life support devices or sy s- tems are devices or systems which, (i) are intended for surgical implant into the body or (ii) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. note : 1. refer to jedec mo-178ab. 2. dimension "d" does not include mold flash, protrusions or gate burrs. mold flash, protrusion or gate burrs shall not exceed 10 mil per side. 3. dimension "e1" does not include inter-lead flash or protrusions. 4. controlling dimension is millimeter, converted inch dimensions are not necessarily exact. 0 0.90 0.30 1.50 2.60 2.80 0.08 0.30 0.00 e l1 l e1 c e e1 d b a2 a1 0.95 bsc 8 0.60 1.90 bsc 0.60 ref 1.30 1.70 3.00 3.00 0.22 0.50 0.15 0.95 min. s y m b o l a 1.45 max. sot-23-6 millimeters c a a2 b with plating view b l1 l seating plane gauge plane 0.25 a1 section a-a base metal e1 d e a a e1 see view b e
|
