________________________________________________________________________ http://www.union-ic.com rev.03 apr.2012 1/7 um8411/8411z 8 line esd/emi protection for color lcd interfaces um8411/8411z dfn16 3.31.3 general description the um8411/8411z is a low pass filter array with integrated tvs diodes. it is designed to suppress unwanted emi/rfi signals and provide electrostatic discharge (esd) protection in portable electronic equipment. this state-of-the -art device utilizes silicon-avalanche technology for superior clamping performance and dc electrical characteristics. it h as been optimized for protection of color lcd panels in cellu lar phones and other portable electronics. the device consists of eight identical circuits comprised of tvs diodes for esd protection, and a rc network for emi filtering. a series resistor value of 100 ? and a capacitance value of 10pf are used to achieve 25db minimum attenuation from 800 mhz to 2.5ghz. the tvs diodes provide effective suppression of esd voltages in excess of 15kv (air discharge) and 8kv (contact discharge) per iec 61000-4-2, level 4. the um8411/8411z is in a 16-pin, rohs compliant dfn16 package. it measures 3.3mm 1.3mm. the leads are spaced at a pitch of 0.4 mm and are finished with lead-free ni pd. the small package makes it ideal for use in portable electr onics such as cell phones, digital still cameras, and pdas. applications features z emi filtering and esd protection for data lines wireless phones z handheld products z notebook computers z lcd displays z emi/rfi filter with integrated tvs for esd protection z esd protection to iec 61000-4-2 (esd) level 4, 15kv (air), 8kv (contact) z 25db minimum attenuation: 800mhz to 2.5ghz z working voltage: 5v z resistor: 100 ? 15% z typical capacitance: 10pf (v r = 2.5v) z solid-state technology z dfn16 package: 3.3mm 1.3 mm z moisture sensitivity level 1 pin configurations top view xx: week code um8411/8411z dfn16 3.3 1.3
________________________________________________________________________ http://www.union-ic.com rev.03 apr.2012 2/7 um8411/8411z ordering information part number working voltage packaging type channel marking code shipping qty um8411 3000pcs /7inch tape & reel tape size: 8mm UM8411Z 5.0v dfn16 lw=3.31.3mm 2 8 8402 3000pcs /7inch tape & reel tape size: 12mm absolute maximum ratings parameter symbol value unit junction temperature t j 125 c steadystate power per resistor @ 25 p r 328 mw operating temperature range t op -40 to 85 c storage temperature range t stg -55 to 150 c maximum lead temperature for soldering t l 260 c electrical characteristics parameter symbol test conditions min typ max unit reverse stand-off voltage v rwm 5.0 v reverse breakdown voltage v br it = 1ma 6.0 7.0 8.0 v reverse leakage current i r v rwm = 3.3v 100 na total series resistance r a i r =20ma each line 85 100 115 ? total capacitance c d input to gnd, each line v r = 0v, f = 1mhz 16 20 24 pf total capacitance c d input to gnd, each line v r = 2.5v, f = 1mhz 9 10 12 pf cut-off frequency (notes) f 3db above this frequency, appreciable attenuation occurs 150 mhz notes: 50 ? source and 50 ? load termination.
________________________________________________________________________ http://www.union-ic.com rev.03 apr.2012 3/7 um8411/8411z typical operating characteristics typical insertion loss s21 an alog crosstalk curve (s41) 1e7 1e8 1e9 -45 -40 -35 -30 -25 -20 -15 -10 -5 s21 (db) frequency (hz) 1e7 1e8 1e9 -60 -55 -50 -45 -40 -35 -30 s41(db) frequency(hz) typical resistance vs. temperature ca pacitance vs. reverse voltage -40-20 0 20406080 96 97 98 99 100 101 102 103 104 resistance(ohm) temperature(celsiur scale) 012345 0.4 0.5 0.6 0.7 0.8 0.9 1.0 f=1m cj(vr)/cj(vr=0) reverse voltage - vr(v) esd clamping (+ 8kv contact) esd clamping (-8kv contact)
________________________________________________________________________ http://www.union-ic.com rev.03 apr.2012 4/7 um8411/8411z applications information device connection the um8411/8411z is comprised of eight identical ci rcuits each consisting of a low pass filter for emi/rfi suppression and dual tvs diodes for esd protection. the device is in a 16-pin dfn package. electrical connection is made to the 16 pins located at the bottom of the device. a center tab serves as the ground connection. the device has a flow through design for easy layout. all path lengths should be kept as short as possible to minimize the effects of parasitic inductance in the board traces. recommendations for the ground connection are given below. ground connection recommendation parasitic inductance present in the board layout will affect the filtering performance of the device. as frequency increases, the effect of the inductan ce becomes more dominant. this effect is given by equation 1. pin identification 1 - 8 input lines 7 - 16 output lines center tab ground equation 1: the impedance of an inductor at frequency xlf xlf(l, f ) = 2 f l where: l= inductance (h) f = frequency (hz) via connections to the ground plan e form rectangular wire loops or ground loop inductance as shown in figure 2. gr ound loop inductance can be reduced by using multiple vias to make the connection to the ground plane. bringing the ground plane closer to the signal layer (preferably the next layer) also reduces ground loop inductanc e. multiple vias in the device ground pad will result in a lower inductive ground loop over two exterior vias. vias with a diameter d are separated by a distance y run betw een layers separated by a distance x. the inductance of the loop path is given by equation 2. thus, decreasing di stance x and y will reduce the loop inductance and result in better high frequency filter characteristics. where: d = diameter of the wire (in) x = length of wire loop (in) y = breath of wire loop (in)
________________________________________________________________________ http://www.union-ic.com rev.03 apr.2012 5/7 um8411/8411z figure 3 shows the recommended device layout. the ground pad vias have a diameter of 0.008 inches (0.20 mm) while the two external vias ha ve a diameter of 0.010 inches (0.250mm). the internal vias are spaced approximately evenly from the center of the pad. the designer may choose to use more vias with a smaller diam eter (such as 0.005 inches or 0.125mm) since changing the diameter of the via will result in little change in inductance (i.e. the log function in equation 2 in highly insensitive to parameter d) . figure 3 ? recommended layout using ground vias
________________________________________________________________________ http://www.union-ic.com rev.03 apr.2012 6/7 um8411/8411z package information um8411/8411z: dfn16 3.31.3 outline drawing dimensions millimeters symbol min typ max d 3.224 3.30 3.376 e 1.25 1.30 1.426 d2 2.70 2.90 3.00 e2 0.20 0.30 0.50 a 0.47 0.50 0.55 a1 - 0.02 0.05 a3 - 0.13 - b 0.15 0.20 0.25 l 0.174 0.25 0.326 e - 0.40 - land pattern notes: 1. compound dimension: 3.31.3; 2. unit: mm; 3. general tolerance 0.05mm unless otherwise specified; 4. the layout is just for reference. tape and reel orientation
________________________________________________________________________ http://www.union-ic.com rev.03 apr.2012 7/7 um8411/8411z important notice the information in this document has been ca refully reviewed and is believed to be accurate. nonetheless, this document is subjec t to change without notice. union assumes no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update or to keep current the contained information, or to notify a person or organization of any update. union rese rves the right to make changes, at any time, in order to improve reliability, function or design and to attempt to supply the best product possible. union semiconductor, inc add: 2f, no. 3, lane 647 songtao road, shanghai 201203 tel: 021-51093966 fax: 021-51026018 website: www.union-ic.com
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