pm73487 released pmc-sierra,in c. 622 mbps atm traffic management device qrt pmc-1980619(r3) proprietary and confidential to pmc - sierra, inc., and for its customers? internal use ? copyright pmc - sierra, inc. 2001. features queuing algorithms receive ? maintains 64 weighted, bandwidth- controlled service classes (scs) with per-vc queues. provides round-robin servicing of queues within each sc provides per-channel (vp or vc), per- sc, and per-direction congested and maximum queue depth limits provides up to 64k cell buffers transmit provides 31 vos maintains 16 scs for each virtual output (vo) with per-vc accounting provides per-channel (vp or vc), per- sc queue (scq), per-sc, per-vo, and per-direction congested and maximum queue depth limits provides up to 64k cell buffers congestion management algorithms supports epd and partial packet discard (ppd) for ubr traffic, and as a backup for abr traffic supports clp-based cell discard and explicit forward congestion indicator (efci) cell marking supports three congestion limits (as well as epd, clp, and efci, and/or backpressure) for logical multicast on the transmit side switching supports vc and vp switching. supports up to 16k vcs address mapping supports all 12 vp and 16 vc bits through use of a double, indirect lookup table performs header translation at both the input (receive) and output (transmit) directions. input header translation is used to pass the output queue channel number through the switch multicast supports logical multicast with a superior queue-clearing algorithm diagnostic/robustness features checks the header parity counts tagged cells runs error checks continually on all fabric lines checks liveness of control signal lines at both switch fabric and utopia interfaces, working around partial fabric failures checks static random access memory (sram) and dynamic random access memory (dram) parity statistics features in the receive direction, counts cells transmitted and dropped. in the transmit direction, counts cells transmitted and dropped on a per-vc basis i/o features provides four switch element interfaces with phase aligners. the phase aligners allow for external serialization of the data stream enabling systems to be built that support device separation of up to 10 meters. provides a utopia level 2 multi-phy (mphy) 16-bit, 50 mhz interface provides a 2-level priority servicing algorithm for high and low bandwidth utopia phy layer devices provides a multiplexed address/data cpu interface provides two 100 mhz, 32-bit, synchronous dram cell buffer interfaces provides three 100 mhz, synchronous sram control interfaces provides a jtag boundary scan interface compatibility features compatible with the atm forum 3.0, 3.1, and 4.0 specifications compatible with the atm forum utopia level 1 and level 2 50 mhz 100 mhz 66 mhz 50 mhz 100 mhz 66 mhz receive utopia transmit utopia to q se from qse bp/ack from qse bp/ack to qse tx dram control tx dram cell buffer mc ram tu ram tsc ram tsf ram ts ram vo ram queue engine ch ram control ch ram al r am al r am control ut o pi a lo op ba ck r sc ra m rsf ra m rs ram abr r am co nt ro l rx dr am co nt ro l ru ram mi crop roce sso r interface m icro pro cess or rx dram cell b uffer abr ram jtag block diagram
head office: pmc-sierra, inc. 8555 baxter place burnaby, b.c. v5a 4v7 canada tel: 604.415.6000 fax: 604.415.6200 622 mbps atm traffic management device to order documentation, send email to: document@pmc-sierra.com or contact the head office, attn: document coordinator all product documentation is available on our web site at: http://www.pmc-sierra.com for corporate information, send email to: info@pmc-sierra.com pmc-1980619(r3) ? copyright pmc-sierra, inc. 2001. all rights reserved. saturn and s/uni are registered trademarks of pmc-sierra, inc. any-phy, freedm, and pos-phy level 3 are trademarks of pmc-sierra, inc. proprietary and confidential to pmc-sierra, inc., and for its customers? internal use released pm73487 specifications compatible with the pm73488 qse physical characteristics 3.3 v supply voltage 5 v tolerant inputs on the microprocessor and utopia interfaces available in a 503-pin enhanced plastic ball grid array (epbga) package typical applications a stand-alone 622 mbit/s switch a 5 gbit/s to 20 gbit/s scalable switch architecture a 2.4 gbit/s to 80 gbit/s scalable switch architecture a 5 gbit/s to 320 gbit/s scalable switch architecture pm73487 qrt? 622 mbit/s atm traffic management device pm7324 atlas-800 atm layer cell routing control, monitoring, and policing 800 mbit/s phy device pm73488 qse? pm73487 #1 qrt? receive input pm73487 #8 qrt? receive input 622 mbit/s aggregate receive utopia level 2 pm73487 #1 qrt? transmit output pm73487 #8 qrt? transmit output 622 mbit/s aggregate pm73487 #9 qrt? receive input pm73487 #16 qrt? receive input pm73487 #9 qrt? transmit output pm73487 #16 qrt? transmit output transmit utopia level 2 622 mbit/s aggregate 622 mbit/s aggregate receive utopia level 2 622 mbit/s aggregate 16 16 transmit utopia level 2 622 mbit/s aggregate 622 mbit/s aggregate 622 mbit/s aggregate pm73488 qse? 16 16 pm73488 qse? pm73488 qse? pm73488 qse? pm73488 qse? x4 x4 x4 x4 typical application- qrt used as a standalone 622 mbps atm switch 64x64 switch application (10gbps)
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