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pe42553 product specification ultracmos? spdt rf switch, 9 khzC8 ghz ?2014, peregrine semiconductor corporation. all rights reserved. ? headquarters: 9380 carroll park drive, san diego, ca, 92121 product specification doc-62463-2 ? (11/2014) www.psemi.com features ? excellent power handling: 36 dbm cw and 38 dbm pulsed power in 50 @ 8 ghz ? high linearity: iip3 of 66 dbm ? high isolation ? 45 db @ 3 ghz ? 41 db @ 8 ghz ? harp? technology enhanced ? fast settling time ? no gate and phase lag ? no drift in insertion loss and phase ? high esd performance ? 2.5 kv hbm on all pins, 4 kv hbm on rf pins to gnd ? 1 kv cdm on all pins ? packaging ? 16-lead 3 3 mm qfn applications ? test and measurement ? signal sources ? communication testers ? spectrum analyzers ? network analyzers ? automated test equipment ? general purpose tx/rx switch product description the pe42553 is a harp tm technology-enhanced absorptive spdt rf switch that supports a broad frequency range from 9 khz to 8 ghz. this general purpose switch maintains excellent linearity, high rf performance and fast settling time making this device ideal for test and measurement (t&m), automated test equipment (ate) and other high performance wireless applications. the pe42553 is a pin-compatible version of the pe42552 with improved power handling capability of 36 dbm continuous wave (cw) and 38 dbm pulsed power in 50 at 8 ghz. no blocking capacitors are required if dc voltage is not present on the rf ports. the pe42553 is manufactured on peregrine?s ultracmos ? process, a patented variation of silicon-on-insulator (soi) technology on a sapphire substrate. figure 1 ? pe42553 functional diagram rfc 50 50 cmos control driver and esd rf2 rf1 ls ctrl v ss_ext
pe42553 ultracmos? spdt rf switch page 2 doc-62463-2 ? (11/2014) www.psemi.com peregrine?s harp technology enhancements deliver high linearity and excellent harmonics performance. it is an innovative feature of the ultracmos process, offering the performance of gaas with the economy and integration of conventional cmos. optional external v ss control for proper operation, the v ss_ext control pin must be grounded or tied to the v ss voltage specified in table 2 . when the v ss_ext control pin is grounded, fets in the switch are biased with an internal negative voltage generator. for applications that require the lowest possible spur performance, v ss_ext can be applied externally to bypass the internal negative voltage generator. absolute maximum ratings exceeding absolute maximum ratings listed in table 1 may cause permanent damage. operation should be restricted to the limits in table 2 . operation between operating range maximum and absolute maximum for extended periods may reduce reliability. esd precautions when handling this ultracmos device, observe the same precautions as with any other esd-sensitive devices. although this device contains circuitry to protect it from damage due to esd, precautions should be taken to avoid exceeding the rating specified in table 1 . latch-up immunity unlike conventional cmos devices, ultracmos devices are immune to latch-up. table 1 ? absolute maximum ratings for pe42553 parameter/condition min max unit supply voltage, v dd ?0.3 5.5 v digital input voltage, ctrl ?0.3 3.6 v ls input voltage ?0.3 3.6 v rf input power, cw (rfc?rfx) (1) 9 khz?10 mhz >10 mhz?8 ghz fig. 2 , fig. 3 37 dbm dbm rf input power, pulsed (rfc?rfx) (2) 9 khz?10 mhz >10 mhz?8 ghz fig. 2 , fig. 3 fig. 4 , fig. 5 dbm dbm rf input power into terminated ports, cw (rfx) (1) 9?800 khz >800 khz?8 ghz fig. 2 , fig. 3 28 dbm dbm storage temperature range ?65 +150 c esd voltage hbm (3) rf pins to gnd all pins 4000 2500 v v
pe42553 ultracmos? spdt rf switch doc-62463-2 ? (11/2014) page 3 www.psemi.com recommended operating conditions table 2 list the recommending operating condition for pe42553. devices should not be operated outside the recommended operating conditions listed below. esd voltage mm, all pins (4) 200 v esd voltage cdm, all pins (5) 1000 v notes: 1) 100% duty cycle, all bands, 50 . 2) pulsed, 5% duty cycle of 4620 s period, 50 . 3) human body model (mil-std 883 method 3015). 4) machine model (jedec jesd22-a115). 5) charged device model (jedec jesd22-c101). table 2 ? recommended operating condition for pe42553 parameter min typ max unit normal mode (v ss_ext = 0v) (1) supply voltage, v dd 2.3 5.5 v supply current, i dd 120 200 a bypass mode (v ss_ext = ?3.4v, v dd 3.4v for full spec. compliance) (2) supply voltage, v dd 2.6 3.4 5.5 v supply current, i dd 50 80 a negative supply voltage, v ss_ext ?3.6 ?2.6 v negative supply current, i ss ?40 ?16 a normal or bypass mode digital input high, ctrl 1.17 3.6 v digital input low, ctrl ?0.3 0.6 v digital input current, i ctrl 10 a rf input power, cw (rfc?rfx) (3) 9 khz?10 mhz >10 mhz?8 ghz fig. 2 , fig. 3 36 dbm dbm rf input power, pulsed (rfc?rfx) (4) 9 khz?10 mhz >10 mhz?8 ghz fig. 2 , fig. 3 fig. 4 , fig. 5 dbm dbm table 1 ? absolute maximum ratings for pe42553 parameter/condition min max unit
pe42553 ultracmos? spdt rf switch page 4 doc-62463-2 ? (11/2014) www.psemi.com electrical specifications table 3 provides the pe42553 key electrical specifications at 25 c (z s = z l = 50 ), unless otherwise specified. normal mode (1) is at v dd = 3.3v and v ss_ext = 0v. bypass mode (2) is at v dd = 3.4v and v ss_ext = ?3.4v. rf input power, hot switch, cw (3) 9?300 khz >300 khz?8 ghz fig. 2 , fig. 3 20 dbm dbm rf input power into terminated ports, cw (rfx) (3) 9?600 khz >600 khz?8 ghz fig. 2 , fig. 3 26 dbm dbm operating temperature range ?40 +25 +85 c notes: 1) normal mode: connect v ss_ext (pin 13) to gnd (v ss_ext = 0v) to enable internal negative voltage generator. 2) bypass mode: use v ss_ext (pin 13) to bypass and disable internal negative voltage generator. 3) 100% duty cycle, all bands, 50 . 4) pulsed, 5% duty cycle of 4620 s period, 50 . table 3 ? pe42553 electrical specifications parameter path condition min typ max unit operating frequency 9 khz 8 ghz as shown insertion loss rfc?rfx 9 khz?10 mhz 10 mhz?3 ghz 3?8 ghz 0.60 0.80 0.85 0.80 1.00 1.05 db db db isolation rfx?rfx 9 khz?10 mhz 10 mhz?3 ghz 3?8 ghz 70 46 33 90 54 36 db db db rfc?rfx 9 khz?10 mhz 10 mhz?3 ghz 3?8 ghz 80 42 38 90 45 41 db db db return loss (active port) rfc?rfx 9 khz?10 mhz 10 mhz?3 ghz 3?8 ghz 23 17 15 db db db return loss (rfc port) rfc?rfx 9 khz?10 mhz 10 mhz?3 ghz 3?8 ghz 23 17 15 db db db return loss (terminated port) rfx 9 khz?10 mhz 10 mhz?3 ghz 3?8 ghz 32 24 19 db db db table 2 ? recommended operating condition for pe42553 (cont.) parameter min typ max unit
pe42553 ultracmos? spdt rf switch doc-62463-2 ? (11/2014) page 5 www.psemi.com switching frequency the pe42553 has a maximum 25 khz switching rate in normal mode (pin 13 tied to ground). a faster switching rate is available in bypass mode (pin 13 tied to v ss_ext ). the rate at which the pe42553 can be switched is then limited to the switching time as specified in table 3 . switching frequency describes the time duration between switching events. switching time is the time duration between the point the control signal reached 50% of the final value and the point the output signal reaches within 10% or 90% of its target value. spur-free performance the typical spurious performance of the pe42553 in normal mode is ?152 dbm (pin 13 tied to ground). if spur-free performance is desired, the internal negative voltage generator can be disabled by applying a negative voltage to v ss_ext (pin 13). logic select the logic select feature is used to determine the definition for the ctrl pin. control logic table 4 provides the control logic truth table for the pe42553. input 0.1db compression point (3) rfc?rfx 10 mhz?8 ghz fig. 4 fig. 5 dbm dbm input ip2 rfc?rfx 834 mhz, 1950 mhz 120 dbm input ip3 rfc?rfx 834 mhz, 1950 mhz and 2700 mhz 66 dbm settling time 50% ctrl to 0.05 db final value 15 20 s switching time 50% ctrl to 90% or 10% of rf 5.5 9.5 s notes: 1) normal mode: connect v ss_ext (pin 29) to gnd (v ss_ext = 0v) to enable internal negative voltage generator. 2) bypass mode: use v ss_ext (pin 29) to bypass and disable internal negative voltage generator. 3) the input 0.1db compression point is a linearity figure of merit. refer to table 2 for the rf input power (50 ). table 3 ? pe42553 electrical specifications parameter path condition min typ max unit table 4 ? truth table for pe42553 ls ctrl rfc?rf1 rfc?rf2 0 0 off on 0 1 on off 1 0 on off 1 1 off on
pe42553 ultracmos? spdt rf switch page 6 doc-62463-2 ? (11/2014) www.psemi.com figure 2 ? power de-rating curve for 9 khzC10 mhz @ 25 c ambient (50) (*) note: * v ss_ext = ?v dd . figure 3 ? power de-rating curve for 9 khzC10 mhz @ 85 c ambient (50) (*) note: * v ss_ext = ?v dd . 0 5 10 15 20 25 30 35 40 1 10 100 1000 10000 input power (dbm) frequency (khz) 2.6 vdd 2.8 vdd 3.0 vdd 3.2 vdd 3.4 vdd 0 5 10 15 20 25 30 35 40 1 10 100 1000 10000 input power (dbm) frequency (khz) 2.6 v dd 2.8 v dd 3.0 v dd 3.2 v dd 3.4 v dd
pe42553 ultracmos? spdt rf switch doc-62463-2 ? (11/2014) page 7 www.psemi.com figure 4 ? power de-rating curve for 10 mhzC8 ghz @ 25 c ambient (50) (*) note: * normal mode at 2.3v v dd 5.5v and v ss_ext = 0v, bypass mode at v dd = 3.4v and v ss_ext = ?3.4v. figure 5 ? power de-rating curve for 10 mhzC8 ghz @ 85 c ambient (50) (*) note: * normal mode at 2.3v v dd 5.5v and v ss_ext = 0v, bypass mode at v dd = 3.4v and v ss_ext = ?3.4v. 34.5 35 35.5 36 36.5 37 37.5 38 38.5 39 39.5 40 40.5 41 41.5 012345678 input power (dbm) frequency (ghz) p0.1db compression / abs. max. rf input power, pulsed @ 25c ambient max. rf input power, pulsed @ 25c ambient max. rf input power, cw @ 25c ambient 34.5 35 35.5 36 36.5 37 37.5 38 38.5 39 39.5 40 40.5 41 012345678 input power (dbm) frequency (ghz) p0.1db compression / abs. max. rf input power, pulsed @ 85c ambient max. rf input power, pulsed @ 85c ambient max. rf input power, cw @ 85c ambient
pe42553 ultracmos? spdt rf switch page 8 doc-62463-2 ? (11/2014) www.psemi.com typical performance data figure 6 ? figure 17 show the typical performance data @ 25 c and v dd = 3.4v (z s = z l = 50 ), unless otherwise specified. figure 6 ? insertion loss vs temperature (rfcCrfx) 0 1 2 3 4 5 6 7 8 insertion loss (db) frequency (ghz) ? 4 0 c +25c +85c ?5 ?4.5 ?4 ?3.5 ?3 ?2.5 ?2 ?1.5 ?1 ?0.5 0
pe42553 ultracmos? spdt rf switch doc-62463-2 ? (11/2014) page 9 www.psemi.com figure 7 ? insertion loss vs v dd (rfcCrfx) figure 8 ? rfc port return loss vs temperature 0 1 2 3 4 5 6 7 8 ?5 ?4.5 ?4 ?3.5 ?3 ?2.5 ?2 ?1.5 ?1 ?0.5 0 insertion loss (db) frequency (ghz) 2.3v 3.4v 5.5v 0 1 2 3 4 5 6 7 8 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 return loss (db) frequency (ghz) ? 4 0 c +25c +85c
pe42553 ultracmos? spdt rf switch page 10 doc-62463-2 ? (11/2014) www.psemi.com figure 9 ? rfc port return loss vs v dd figure 10 ? active port return loss vs temperature 0 1 2 3 4 5 6 7 8 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 return loss (db) frequency (ghz) 2.3v 3.4v 5.5v 0 1 2 3 4 5 6 7 8 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 return loss (db) frequency (ghz) ? 4 0 c +25c +85c
pe42553 ultracmos? spdt rf switch doc-62463-2 ? (11/2014) page 11 www.psemi.com figure 11 ? active port return loss vs v dd figure 12 ? terminated port return loss vs temperature 0 1 2 3 4 5 6 7 8 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 return loss (db) frequency (ghz) 2.3v 3.4v 5.5v 0 1 2 3 4 5 6 7 8 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 return loss (db) frequency (ghz) ? 40c +25c +85c
pe42553 ultracmos? spdt rf switch page 12 doc-62463-2 ? (11/2014) www.psemi.com figure 13 ? terminated port return loss vs v dd figure 14 ? isolation vs temperature (rfxCrfx) 0 1 2 3 4 5 6 7 8 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 return loss (db) frequency (ghz) 2.3v 3.4v 5.5v 0 1 2 3 4 5 6 7 8 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 frequency (ghz) isolation (db) ? 4 0 c +25c +85c
pe42553 ultracmos? spdt rf switch doc-62463-2 ? (11/2014) page 13 www.psemi.com figure 15 ? isolation vs v dd (rfxCrfx) figure 16 ? isolation vs temperature (rfcCrfx) 0 1 2 3 4 5 6 7 8 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 frequency (ghz) isolation (db) 2.3v 3.4v 5.5v 0 1 2 3 4 5 6 7 8 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 frequency (ghz) isolation (db) ?40c +25c +85c
pe42553 ultracmos? spdt rf switch page 14 doc-62463-2 ? (11/2014) www.psemi.com figure 17 ? isolation vs v dd (rfcCrfx) 0 1 2 3 4 5 6 7 8 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 frequency (ghz) isolation (db) 2.3v 3.4v 5.5v
pe42553 ultracmos? spdt rf switch doc-62463-2 ? (11/2014) page 15 www.psemi.com evaluation kit the spdt switch evaluation board was designed to ease customer evaluation of peregrine?s pe42553. the rf common port is connected through a 50 transmission line via the sma connector, j1. rf1 and rf2 ports are connected through 50 transmission lines via sma connectors j2 and j3, respectively. a 50 through trans- mission line is available via sma connectors j5 and j6, which can be used to de-embed the loss of the pcb. j4 provides dc and digital inputs to the device. for the true performance of the pe42553 to be realized, the pcb must be designed in such a way that rf trans- mission lines and sensitive dc i/o traces are heavily isolated from one another. figure 18 ? evaluation kit layout for pe42553
pe42553 ultracmos? spdt rf switch page 16 doc-62463-2 ? (11/2014) www.psemi.com pin information this section provides pinout information for the pe42553. figure 19 shows the pin map of this device for the available package. table 5 provides a description for each pin. figure 19 ? pin configuration (top view) exposed ground pad gnd rf1 gnd gnd gnd gnd rfc gnd gnd rf2 gnd gnd v dd ls ctrl v ss_ext 1 3 2 4 12 10 11 9 5 7 6 8 16 14 15 13 pin 1 dot marking table 5 ? pin descriptions for pe42553 pin no. pin name description 1, 3?6, 8?10, 12 gnd ground. 2 rf1 (1) rf port 1. 7 rfc (1) rf common. 11 rf2 (1) rf port 2. 13 v ss_ext (2) external v ss negative voltage control. 14 ctrl digital control logic input. 15 ls logic select ? used to determine the definition for the ctrl pin (see table 4 ). 16 v dd supply voltage. pad gnd exposed pad: ground for proper oper- ation. notes: 1) rf pins 2, 7 and 11 must be at 0 vdc. the rf pins do not require dc blocking capacitors for proper operation if the 0 vdc requirement is met. 2) use v ss_ext (pin 13) to bypass and disable internal negative voltage generator. connect v ss_ext (pin 13) to gnd (v ss_ext = 0v) to enable internal negative voltage generator.
pe42553 ultracmos? spdt rf switch doc-62463-2 ? (11/2014) page 17 www.psemi.com packaging information this section provides packaging data including the moisture sensitivity level, package drawing, package marking and tape-and-reel information. moisture sensitivity level the moisture sensitivity level rating for the pe42553 in the 16-lead 3 3 mm qfn package is msl3. package drawing top-marking specification figure 20 ? package mechanical drawing for 16-lead 3 3 0.85 mm qfn figure 21 ? package marking specifications for pe42553 top view side view bottom view 3.00 3.00 pin #1 corner 1.700.05 0.850.05 0.05 0.203 recommended land pattern 13 16 1 4 5 9 8 12 1.700.05 0.50 0.250.05 (x16) 1.50 0.300.05 (x16) 1.75 3.75 3.75 0.10 c a b 0.05 c a 0.10 c (2x) c 0.10 c 0.05 c seating plane b all features 0.10 c (2x) 0.750 (x16) 0.30 (x16) 0.50 1.75 (x12) (x12) = yy = ww = zzzzzz = pin 1 indicator last two digits of assembly year assembly work week assembly lot code (maximum six characters) 42553 yyww zzzzzz
pe42553 ultracmos? spdt rf switch page 18 doc-62463-2 ? (11/2014) www.psemi.com tape and reel specification figure 22 ? tape and reel specifications for 16-lead 3 3 0.85 mm qfn t k0 a0 b0 p0 p1 d1 a section a-a a direction of feed d0 e w0 p2 see note 3 see note 1 f see note 3 a0 b0 k0 d0 d1 e f p0 p1 p2 t w0 3.3 3.3 1.10 1.50 + 0.10/ -0.00 1.50 min 1.75 0.10 5.50 0.05 4.00 8.00 2.00 0.05 0.30 0.05 12.00 0.30 device orientation in tap e pin 1 notes: 1. 10 sprocket hole pitch cumulative tolerance 0.2 2. camber in compliance with eia 481 3. pocket position relative to sprocket hole measured as true position of pocket, not pocket hole dimensions are in milimeters unless otherwise specified
pe42553 ultracmos? spdt rf switch product specification www.psemi.com doc-62463-2 ? (11/2014) document categories advance information the product is in a formative or design stage. the datasheet contains design target specifications for product development. specifications and features may change in any manner without notice. preliminary specification the datasheet contains preliminary data. additional data may be added at a later date. peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. product specification the datasheet contains final data. in the event peregrine decides to change the specifications, peregrine will notify customers of the intended changes by issuing a cnf (customer notification form). not recommended for new designs (nrnd) this product is in production but is not recommended for new designs. end of life (eol) this product is currently going through the eol process. it has a specific last-time buy date. obsolete this product is discontinued. orders are no longer accepted for this product. sales contact for additional information, contact sales at sales@psemi.com. disclaimers the information in this datasheet is believed to be reliable. however, peregrine assumes no liability for the use of this infor mation. use shall be entirely at the user?s own risk. no patent rights or licenses to any circuits described in this datasheet are implied or grante d to any third party. peregrine?s products are not designed or intended for use in devices or systems intended for surgical implant, or in other appl ications intended to support or sustain life, or in any application in which the failure of the peregrine product could create a situation in which personal injury or death might occur. peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. patent statement peregrine products are protected under one or more of the following u.s. patents: patents.psemi.com copyright and trademark ?2014, peregrine semiconductor corporation. all rights reserved. the peregrine name, logo, utsi and ultracmos are registered tr ademarks and harp, multiswitch and dune are trademarks of peregrine semiconductor corp. ordering information table 6 lists the available ordering codes for the pe42553 as well as available shipping methods. table 6 ? order codes for pe42553 order codes description packaging shipping method pe42553a-z pe42553 spdt rf switch green 16-lead 3 3 mm qfn 3000 units / t&r EK42553-01 pe42553 evaluation kit evaluation kit 1 / box

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