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  ? semiconductor components industries, llc, 2015 november, 2015 ? rev. p1 1 publication order number: nvmfd5875nl/d nvmfd5875nl product preview power mosfet 60 v, 33 m  , 22 a, dual n?channel, logic level, dual so8fl features ? low r ds(on) to minimize conduction losses ? low capacitance to minimize driver losses ? nvmfd5875nlwf ? wettable flanks option for enhanced optical inspection ? aec?q101 qualified and ppap capable ? these devices are pb?free, halogen free and are rohs compliant maximum ratings (t j = 25 c unless otherwise noted) parameter symbol value unit drain?to?source v oltage v dss 60 v gate?to?source v oltage v gs  20 v continuous drain cur - rent r  jc (notes 1, 2, 3, 4) steady state t c = 25 c i d 22 a t c = 100 c 15 power dissipation r  jc (notes 1, 2, 3) t c = 25 c p d 32 w t c = 100 c 16 continuous drain cur - rent r  ja (notes 1 & 3, 4) steady state t a = 25 c i d 7 a t a = 100 c 5.8 power dissipation r  ja (notes 1, 3) t a = 25 c p d 3.2 w t a = 100 c 2.2 pulsed drain current t a = 25 c, t p = 10  s i dm 80 a operating junction and storage temperature t j , t stg ?55 to +175 c source current (body diode) i s 19 a single pulse drain? to?source avalanche energy (t j = 25 c, v dd = 24 v, v gs = 10 v, r g = 25  ) (i l(pk) = 14.5 a, l = 0.1 mh) e as 10.5 mj (i l(pk) = 6.3 a, l = 2 mh) 40 lead temperature for soldering purposes (1/8 from case for 10 s) t l 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. thermal resistance maximum ratings (note 1) parameter symbol value unit junction?to?case ? steady state (note 2, 3) r  jc 4.65 c/w junction?to?ambient ? steady state (note 3) r  ja 47 1. the entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. psi (  ) is used as required per jesd51?12 for packages in which substantially less than 100% of the heat flows to single case surface. 3. surface?mounted on fr4 board using a 650 mm 2 , 2 oz. cu pad. 4. maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. this document contains information on a product under development. on semiconductor reserves the right to change or discontinue this product without notice. ordering information www. onsemi.com device package shipping ? v (br)dss r ds(on) max i d max 60 v 33 m  @ 10 v 22 a ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. dfn8 5x6 (so8fl) case 506bt marking diagram 45 m  @ 4.5 v nvmfd5875nlt1g dfn8 (pb?free) 1500 / tape & reel nvmfd5875nlt3g dfn8 (pb?free) 5000 / tape & reel d1 d1 d2 d2 s1 g1 s2 g2 dual n?channel d1 s1 g1 5875xx aywzz d2 d1 d2 s2 g2 d2 d1 1 NVMFD5875NLWFT1G dfn8 (pb?free) 1500 / tape & reel nvmfd5875nlwft3g dfn8 (pb?free) 5000 / tape & reel 5875nl = specific device code for nvmfd5875nl 5875lw = specific device code for nvmfd5875nlwf a = assembly location y = year w = work week zz = lot traceability
nvmfd5875nl www. onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise specified) parameter symbol test condition min typ max unit off characteristics drain?to?source breakdown voltage v (br)dss v gs = 0 v, i d = 250  a 60 v drain?to?source breakdown voltage temperature coefficient v (br)dss /t j 53 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 60 v t j = 25 c 1.0  a t j = 125 c 10 gate?to?source leakage current i gss v ds = 0 v, v gs = 20 v 100 na on characteristics (note 5) gate threshold voltage v gs(th) v gs = v ds , i d = 250  a 1.0 3.0 v negative threshold temperature coefficient v gs(th) /t j 3.5 mv/ c drain?to?source on resistance r ds(on) v gs = 10 v i d = 7.5 a 27 33 m  v gs = 4.5 v i d = 7.5 a 37 45 forward transconductance g fs v ds = 15 v, i d = 5.0 a 7.0 s charges and capacitances input capacitance c iss v gs = 0 v, f = 1.0 mhz, v ds = 25 v 540 pf output capacitance c oss 55 reverse transfer capacitance c rss 36 total gate charge q g(tot) v gs = 4.5 v, v ds = 48 v, i d = 5.0 a 5.9 nc threshold gate charge q g(th) 0.62 gate?to?source charge q gs 1.64 gate?to?drain charge q gd 2.80 total gate charge q g(tot) v gs = 10 v, v ds = 48v, i d = 5.0a 11 20 nc switching characteristics (note 6) turn?on delay time t d(on) v gs = 4.5 v, v ds = 48 v, i d = 5.0 a, r g = 2.5  8.1 ns rise time t r 15.8 turn?off delay time t d(off) 11.8 fall time t f 3.9 turn?on delay time t d(on) v gs = 10 v, v ds = 48 v, i d = 5.0 a, r g = 2.5  4.9 ns rise time t r 6.4 turn?off delay time t d(off) 14.5 fall time t f 2.4 drain?source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 5.0 a t j = 25 c 0.8 1.2 v t j = 125 c 0.7 reverse recovery time t rr v gs = 0 v, d is /d t = 100 a/  s, i s = 5.0 a 14.5 ns charge time t a 11.5 discharge time t b 3.1 reverse recovery charge q rr 11 nc package parasitic values source inductance l s t a = 25 c 0.93 nh drain inductance l d 0.005 gate inductance l g 1.84 gate resistance r g 1.5  5. pulse test: pulse width = 300  s, duty cycle  2%. 6. switching characteristics are independent of operating junction temperatures.
nvmfd5875nl www. onsemi.com 3 typical characteristics 012345 figure 1. on?region characteristics v ds , drain?to?source voltage (v) i d , drain current (a) 5 v 3.5 v v gs = 10 v 4.0 v 4.5 v t j = 25 c 3.0 v 0 4 8 12 16 20 24 28 32 0 10 20 30 1234 5 v ds 10 v t j = 25 c t j = ?55 c t j = 125 c figure 2. transfer characteristics v gs , gate?t o?source voltage (v) i d , drain current (a) 0.025 0.030 0.035 0.040 0.045 0.050 34 6 8 10 5 figure 3. on?resistance vs. gate?to?source voltage v gs , gate?t o?source voltage (v) r ds(on) , drain?to?source resistance (  ) i d = 10 a t j = 25 c 0.025 0.035 0.045 0.055 0.065 511 20 81417 figure 4. on?resistance vs. drain current and gate voltage i d , drain current (a) r ds(on) , drain?to?source resistance (  ) v gs = 4.5 v t j = 25 c v gs = 10 v 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.4 ?50 ?25 0 25 50 75 100 125 175 figure 5. on?resistance variation with temperature t j , junction temperature ( c) r ds(on) , drain?to?source resistance (normalized) v gs = 10 v i d = 7.5 a 1e?04 figure 6. drain?to?source leakage current vs. voltage v ds , drain?to?source voltage (v) i dss , leakage (a) t j = 125 c t j = 150 c v gs = 0 v 36 40 0.055 0.060 0.065 79 23 0.030 0.040 0.050 0.060 150 t j = 25 c 5 101520253035404550556 0 1e?05 1e?06 1e?07 1e?08 1e?09 1e?10 1e?11 1e?12 2.2
nvmfd5875nl www. onsemi.com 4 typical characteristics 0 100 200 300 400 500 600 700 800 0 5 10 15 20 25 30 figure 7. capacitance variation drain?to?source voltage (v) c, capacitance (pf) t j = 25 c v gs = 0 v c iss c oss c rss figure 8. gate?to?source vs. gate charge q g , total gate charge (nc) v gs , gate?t o?source voltage (v) 1 10 100 1000 1 10 100 figure 9. resistive switching time variation vs. gate resistance r g , gate resistance (  ) t, time (ns) v dd = 48 v i d = 5 a v gs = 10 v t d(off) t d(on) t f t r 0 10 20 30 40 0.5 0.6 0.7 0.8 0.9 1.0 figure 10. diode forward voltage v sd , source?to?drain voltage (v) i s , source current (a) t j = 25 c v gs = 0 v figure 11. maximum rated forward biased safe operating area v ds , drain voltage (v) i d , drain current (a) 0.1 0.2 0.3 0.4 0 1 2 3 4 5 6 7 8 9 10 01234567891011 t j = 25 c v dd = 48 v i d = 5 a q t q gs q gd 100  s 10  s 1 ms dc 10 ms v gs = 20 v single pulse t c = 25 c r ds(on) limit thermal limit package limit 100 10 1 0.1 0.1 1 10 100
nvmfd5875nl www. onsemi.com 5 typical characteristics 0.01 0.1 1 10 100 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 0.1 duty cycle = 0.5 0.2 0.05 0.02 0.01 single pulse figure 12. thermal response pulse time (sec) r  ja(t) ( c/w) device mounted on 650 mm 2 2 oz cu pcb
nvmfd5875nl www. onsemi.com 6 package dimensions dfn8 5x6, 1.27p dual flag (so8fl?dual) case 506bt issue e *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 1.27 0.75 1.40 3.70 4.56 8x pitch 6.59 4.84 1.00 dimension: millimeters 2.30 4x 0.70 5.55 4x 0.56 2x 2.08 2x m 3.25 h ??? 3.50 ??? notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30 mm from the terminal tip. 4. profile tolerance applies to the exposed pad as well as the terminals. 5. dimensions d1 and e1 do not include mold flash, protrusions, or gate burrs. 6. seating plane is defined by the terminals. a1 is defined as the distance from the seating plane to the lowest point on the package body. 7. a visual indicator for pin 1 must be located in this are a. 1234 5 6 top view side view bottom view d1 e1 h d e b a 0.20 c 0.20 c 2x 2x dim min millimeters a 0.90 a1 ??? b 0.33 c 0.20 d 5.15 bsc d1 4.70 d2 3.90 e 6.15 bsc e1 5.70 e2 3.90 e 1.27 bsc g 0.45 k 0.51 l 0.48 a 0.10 c 0.10 c 14 8 e 8x d2 b1 e2 b a 0.10 b c 0.05 c l detail a a1 c 4x 5 max ??? ??? 0.42 ??? 4.90 4.10 5.90 4.15 0.55 ??? 0.61 m n 1.80 2.00 7 8 n pin one identifier note 7 note 4 c seating plane detail a note 6 4x k note 3 d3 1.50 1.70 b1 0.33 0.42 4x d3 g 4x detail b detail b alternate construction k1 0.56 ??? k1 3.75 12  max 1.10 0.05 0.51 0.33 5.10 4.30 6.10 4.40 0.65 ??? 0.71 2.20 1.90 0.51 ??? on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 nvmfd5875nl/d literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative


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