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1.3 cmos, 1.8 v to 5.5 v single spdt switch/2:1 mux in sot-66 package adg859 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2006 analog devices, inc. all rights reserved. features 1.8 v to 5.5 v single supply tiny 1.65 mm 1.65 mm package low on resistance: 1.3 at 5 v supply high current-carrying capability: 300 ma continuous current 500 ma peak current at 5 v rail-to-rail operation typical power consumption: <0.01 w ttl-/cmos-compatible inputs applications cellular phones pdas mp3 players battery-powered systems audio and video signal routing modems pcmcia cards hard drives relay replacement functional block diagram 05258-001 switches shown for a logic 1 input s 2 s 1 adg859 d in figure 1. general description the adg859 is a monolithic, cmos spdt (single pole, double throw) switch that operates with a supply range of 1.8 v to 5.5 v. it is designed to offer low on resistance of 2.3 maxi- mum over the entire temperature range of ?40c to +125c. the adg859 also has the capability of carrying large amounts of current, typically 300 ma at 5 v operation. these features make the adg859 an ideal solution for applications that are space-constrained, such as handsets, pdas, and mp3 players. each switch conducts equally well in both directions when on. the device exhibits break-before-make switching action, thereby preventing momentary shorting when switching channels. the adg859 is available in a tiny 6-lead sot-66 package. product highlights 1. low on resistance: 2.3 maximum over the full temperature range of ?40c to +125c. 2. high current-carrying capability. 3. tiny 6-lead, 1.65 mm 1.65 mm sot-66 package.
adg859 rev. a | page 2 of 16 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 product highlights ........................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 5 esd caution ...................................................................................5 pin configuration and function descriptions ..............................6 typical performance characteristics ..............................................7 test circ u its ..................................................................................... 10 ter mi nolo g y .................................................................................... 12 outline dimensions ....................................................................... 13 ordering guide .......................................................................... 13 revision history 12/06rev. 0 to rev. a changes to the ordering guide.................................................... 13 6/05revision 0: initial version
adg859 rev. a | page 3 of 16 specifications v dd = 5 v 10%, gnd = 0 v, unless otherwise noted. 1 table 1. parameter 25c ? 40c to +85c ? 40c to +125c unit test conditions/comments analog switch analog signal range 0 to v dd v on resistance, r on 1.3 typ v dd = 4.5 v, v s = 0 v to v dd , i s = ?100 ma; 2.1 2.2 2.3 max figure 16 on resistance match between channels, ?r on 0.01 typ v dd = 4.5 v, v s = 4.5v, i s = ?100 ma; 0.093 0.163 0.163 max figure 16 on resistance flatness, r flat (on) 0.32 typ v dd = 4.5 v, v s = 0 v to v dd , i s = ?100 ma; 0.45 0.6 0.65 max figure 16 leakage currents v dd = 5.5 v source off leakage, i s (off ) 0.02 na typ v s = 4.5 v/1 v, v d = 1 v/4.5 v; figure 17 channel on leakage, i d , i s (on) 0.02 na typ v s = v d = 1 v or 4.5 v; figure 18 digital inputs input high voltage, v inh 2 v min input low voltage, v inl 0.8 v max input current, i inl or i inh 0.005 a typ v in = v inl or v inh 0.1 a max digital input capacitance, c in 4 pf typ dynamic characteristics 2 t on 8 ns typ r l = 50 , c l = 35 pf 10 11 12 ns max v s = 3 v; figure 19 t off 4.5 ns typ r l = 50 , c l = 35 pf 6 6.5 7 ns max v s = 3 v; figure 19 break-before-make time delay, t bbm 4 ns typ r l = 50 , c l = 35 pf 1 ns min v s1 = v s2 = 1.5 v; figure 20 charge injection 13 pc typ v s = 0 v, r s = 0 , c l = 1 nf; figure 21 off isolation ?78 db typ r l = 50 , c l = 5 pf, f = 100 khz; figure 22 channel-to-channel crosstalk ?78 db typ r l = 50 , c l = 5 pf, f = 100 khz; figure 23 ? 3 db bandwidth 125 mhz typ r l = 50 , c l = 5 pf; figure 24 insertion loss ? 0.11 db typ r l = 50 , c l = 5 pf; figure 24 total harmonic distortion (thd + n) 0.062 % r l = 32 , f = 20 hz to 20 khz, v s = 3 v p-p; figure 14 c s (off ) 18 pf typ f = 1 mhz c d , c s (on) 45 pf typ f = 1 mhz power requirements v dd = 5.5 v i dd 0.001 a typ digital inputs = 0 v or 5.5 v 1 a max 1 temperature range is ? 40c to +125c. 2 guaranteed by design; not subject to production test.
adg859 rev. a | page 4 of 16 v dd = 2.7 v to 3.6 v, gnd = 0 v, unless otherwise noted. 1 table 2. parameter 25c ?40c to +85c ?40c to +125c unit test conditions/comments analog switch analog signal range 0 to v dd v on resistance, r on 3 typ v dd = 2.7 v, v s = 0 v to v dd , i s = ?100 ma; 4.3 4.5 4.7 max figure 16 on resistance match between channels, ?r on 0.03 typ v dd = 2.7 v, v s = 1.2 v, i s = ?100 ma; 0.11 0.15 0.15 max figure 16 leakage currents v dd = 3.6 v source off leakage, i s (off ) 0.02 na typ v s = 3 v/1 v, v d = 1 v/3 v; figure 17 channel on leakage, i d , i s (on) 0.05 na typ v s = v d = 1 v or 3 v; figure 18 digital inputs input high voltage, v inh 2.0 v min input low voltage, v inl 0.8 v max v dd = 3 v to 3.6 v 0.7 v max v dd = 2.7 v input current, i inl or i in 0.005 a typ v in = v inl or v inh 0.1 0.1 a max digital input capacitance, c in 4 pf typ dynamic characteristics 2 t on 11 ns typ r l = 50 , c l = 35 pf 15 16 17 ns max v s = 1.5 v; figure 19 t off 6 ns typ r l = 50 , c l = 35 pf 9.5 10 11 ns max v s = 1.5 v; figure 19 break-before-make time delay, t bbm 5 ns typ r l = 50 , c l = 35 pf 1 ns min v s1 = v s2 = 1.5 v; figure 20 charge injection 7 pc typ v s = 0 v, r s = 0 , c l = 1 nf; figure 21 off isolation ?78 db typ r l = 50 , c l = 5 pf, f = 100 khz; figure 22 channel-to-channel crosstalk ?78 db typ s1 to s2; r l = 50 , c l = 5 pf, f = 100 khz; figure 23 ?3 db bandwidth 125 mhz typ r l = 50 , c l = 5 pf; figure 24 insertion loss ? 0.11 db typ r l = 50 , c l = 5 pf; figure 24 total harmonic distortion (thd + n) 0.1 % r l = 32 , f = 20 hz to 20 khz, v s = 2 v p-p; figure 14 c s (off ) 18 pf typ f = 1 mhz c d , c s (on) 46 pf typ f = 1 mhz power requirements v dd = 3.6 v i dd 0.001 a typ digital inputs = 0 v or 3.6 v 1 a max 1 temperature range is ? 40c to +125c. 2 guaranteed by design; not subject to production test.
adg859 rev. a | page 5 of 16 absolute maximum ratings t a = 25c, unless otherwise noted. table 3. parameter rating v dd to gnd ?0.3 v to +7.0 v analog inputs 1 ?0.3 v to v dd + 0.3 v or 30 ma, whichever occurs first digital inputs 1 ?0.3 v to v dd + 0.3 v or 30 ma, whichever occurs first peak current, s or d 5 v operation 500 ma 3 v operation 460 ma continuous current, s or d 5 v operation 300 ma 3 v operation 275 ma operating temperature range automotive ?40c to +85c storage temperature range ?65c to +150c junction temperature 150c sot-66 package (4-layer board) ja thermal impedance 191c/w lead-free reflow peak temperature time at peak temperature 260 (+0/?5)c 10 sec to 40 sec 1 overvoltages at s or d are clamped by internal diodes. current should be limited to the maximum ratings given. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. only one absolute maximum rating may be applied at any one time. table 4. truth table logic (in) switch 2 (s2) switch 1 (s1) 0 off on 1 on off esd caution
adg859 rev. a | page 6 of 16 pin configuration and fu nction descriptions in 1 v dd 2 gnd 3 s2 6 d 5 s1 4 adg859 top view (not to scale) 05258-002 figure 2. 6-lead sot-66 pin configuration table 5. pin function descriptions pin no. mnemonic description 1 in logic control input. 2 v dd most positive power supply potential. 3 gnd ground (0 v) reference. 4 s1 source terminal. can be an input or an output. 5 d drain terminal. can be an input or an output. 6 s2 source terminal. can be an input or an output.
adg859 rev. a | page 7 of 16 typical performance characteristics 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 r on ( ? ) 012345 v s /v d (v) 05258-012 v dd =4.5v v dd =5v v dd =5.5v t a = 25c i ds = 100ma figure 3. on resistance vs. v s (v d ), v dd = 5 v 10% 0 0.5 1.0 1.5 2.0 2.5 3.0 r on ( ? ) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 v s /v d (v) 05258-024 v dd =2.7v v dd =3v v dd =3.3v v dd =3.6v t a =25c i ds = 100ma figure 4. on resistance vs. v s (v d ), v dd = 2.7 v to 3.6 v 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 on resistance ( ? ) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 source voltage (v) 05258-014 +125c +85c +25c ?40c v dd =5v i ds = 100ma figure 5. on resistance vs. source voltage for different temperatures, v dd = 5 v 0 0.5 1.0 1.5 2.0 2.5 3.0 on resistance ( ? ) 1.0 1.5 0 0.5 2.0 2.5 3.0 source voltage (v) 05258-013 ?40c +25c +85c +125c v dd =3v i ds = 100ma figure 6. on resistance vs. source voltage for different temperatures, v dd = 3 v ?1 0 1 2 3 4 leakage (na) 40 20 ?20 0 ?40 60 80 100 120 temperature ( c) 05258-016 5 i s (off) i d , i s (on) v dd = 5v figure 7. leakage vs. temperature, v dd = 5 v ?0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 leakage (na) 40 20 ?20 0 ?40 60 80 100 120 temperature ( c) 05258-015 i d , i s (on) i s (off) v dd = 3v figure 8. leakage vs. temperature, v dd = 3 v
adg859 rev. a | page 8 of 16 0 charge injection (pc) 30 0 5.0 v d (v) 05258-017 25 20 15 10 5 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 t a = 25 c v dd = 3v v dd = 5v figure 9. charge injection vs. source voltage 0 2 4 6 8 10 12 14 time (ns) 020 ?40 ?20 40 60 80 temperature ( c) 05258-018 v dd = 3.3v t on v dd = 5v v dd = 3.3v t off v dd = 5v figure 10. t on /t off times vs. temperature ?12 ?10 ?8 ?6 ?4 ?2 0 on response (db) 100 1k 10k 100k 1m 10m 100m 1g frequency (hz) 05258-019 t a = 25 c v dd = 3v/5v figure 11. bandwidth ?120 ?100 ?80 ?60 ?40 ?20 0 attenuation (db) 100 1k 10k 100k 1m 10m 100m frequency (hz) 05258-020 t a = 25 c v dd = 3v/5v figure 12. off isolation vs. frequency 100m ?120 ?100 ?80 ?60 ?40 ?20 0 attenuation (db) 100 1k 10k 100k 1m 10m frequency (hz) 05258-021 t a = 25 c v dd = 3v/5v figure 13. crosstalk vs. frequency 0 0.02 0.04 0.06 0.08 0.10 0.12 0.14 0.16 0.18 0.20 thd + n (%) frequency (hz) 05258-022 t a = 25 c 0 5k 10k 15k 20k v dd = 3v, v s = 2v p-p v dd = 5v, v s = 3v p-p figure 14. total harmonic distortion + noise
adg859 rev. a | page 9 of 16 ?120 ?100 ?80 ?60 ?40 ?20 0 psrr (db) 100 1k 10k 100k 1m 10m 100m frequency (hz) 05258-023 t a = 25 c v dd = 3v/5v no supply decoupling figure 15. psrr
adg859 rev. a | page 10 of 16 test circuits 05258-003 sd v s v i ds figure 16. on resistance sd v s v d i s (off) i d (off) a a 05258-004 figure 17. off leakage s v d i d (on) nc a 05258-005 d nc = no connect figure 18. on leakage 05258-006 v out t on t off v in 50% 50% v in 50% 50% 90% 90% d gnd r l 50? c l 35pf v dd v out v s v in v dd 0.1f in s2 s1 figure 19. switching times, t on , t off 05258-007 v out v in t bbm t bbm 80% d in gnd r l 50? c l 35pf v dd v out v s v dd 0.1f s2 s1 v in figure 20. break-before-make time delay, t bbm 0 5258-008 v in (normally closed switch) v in (normally open switch) v out on q inj =c l v out off v out in gnd v dd v dd 0.1f v s c l 1nf v out nc s2 s1 d v in nc = no connect figure 21. charge injection
adg859 rev. a | page 11 of 16 05258-009 v dd v s v dd v in nc in network analyzer s1 s2 gnd off isolation = 20 log nc = no connect d 50? 50? v out r l 50 ? 0.1f v out v s figure 22. off isolation 05258-010 v out v dd in v dd gnd v s r l 50? r 50 ? 0.1f 50? s1 d s2 channel-to-channel crosstalk = 20 log v out v s network analyzer figure 23. channel-to-channel crosstalk 0 5258-011 v dd v s v dd v in nc in network analyzer s1 s2 gnd d 50? v out r l 50 ? 0.1f insertion loss = 20 log nc = no connect v out with switch v out without switch figure 24. bandwidth
adg859 rev. a | page 12 of 16 terminology v dd most positive power supply potential. i dd positive supply current. gnd ground (0 v) reference. s source terminal. can be an input or an output. d drain terminal. can be an input or an output. in logic control input. v d (v s ) analog voltage on the d and s terminals. r on ohmic resistance between the d and s terminals. r flat (on) flatness is defined as the difference between the maximum and minimum value of on resistance as measured. r on on resistance mismatch between any two channels. i s (off) source leakage current with the switch off. i d (off) drain leakage current with the switch off. i d , i s (on) channel leakage current with the switch on. v inl maximum input voltage for logic 0. v inh minimum input voltage for logic 1. i inl (i inh ) input current of the digital input. c s (off) off switch source capacitance. measured with reference to ground. c d (off) off switch drain capacitance. measured with reference to ground. c d , c s (on) on switch capacitance. measured with reference to ground. c in digital input capacitance. t on delay time between the 50% and 90% points of the digital input and switch on condition. t off delay time between the 50% and 90% points of the digital input and switch off condition. t bbm on or off time measured between the 80% points of both switches when switching from one to another. charge injection a measure of the glitch impulse transferred from the digital input to the analog output during on/off switching. off isolation a measure of unwanted signal coupling through an off switch. crosstalk a measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. ?3 db bandwidth the frequency at which the output is attenuated by 3 db. on response the frequency response of the on switch. insertion loss the loss due to the on resistance of the switch. thd + n the ratio of harmonic amplitudes plus noise of a signal to the fundamental.
adg859 rev. a | page 13 of 16 outline dimensions seating plane 0.60 0.57 0.53 12 max top view 0.34 max 0.27 nom 0.18 0.17 0.13 bottom view 1.70 1.66 1.50 1.30 1.20 1.10 1.70 1.65 1.50 1 3 5 6 2 4 0.10 nom 0.05 min 0.20 min 0.50 bsc 0.25 max 0.17 min 0.30 0.23 0.10 0.26 0.19 0.11 pin 1 figure 25. 6-lead small outline transistor package [sot-66] (ry-6-1) dimensions shown in millimeters ordering guide model temperature range package description package option branding 1 adg859yryz-reel 2 ?40c to +125c 6-lead small outline transistor package [sot-66] ry-6-1 04 adg859yryz-reel7 2 ?40c to +125c 6-lead small outline transistor package [sot-66] ry-6-1 04 adg859bryz-reel 2 ?40c to +85c 6-lead small outline transistor package [sot-66] ry-6-1 02 adg859bryz-reel7 2 ?40c to +85c 6-lead small outline transistor package [sot-66] ry-6-1 02 eval-adg859eb evaluation board 1 branding on this package is limited to two characters due to space constraints. 2 z = pb-free part.
adg859 rev. a | page 14 of 16 notes
adg859 rev. a | page 15 of 16 notes
adg859 rev. a | page 16 of 16 notes ?2006 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d05258-0-12/06(a)

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