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ALT6725 help3e tm dual-band cellular & pcs lte 3.4 v linear power amplifer module preliminary data sheet - rev 1.0 features ? ingap hbt technology ? high effciency: ? 35 % @ p out = +27.5 dbm ? 16 % @ p out = +15 dbm ? 8 % @ p out = +9 dbm ? low quiescent current: 4 ma ? internal voltage regulation ? built-in directional coupler ? common v mode control line ? suitable for smps and average power tracking systems with variable supply voltages ? apt can reduce ts.09 average power consumption more than 25% ? reduced external component count ? thin package: 0.9 mm ? rohs compliant package, 260 o c msl-3 applications ? dual-band wireless handsets and data devices for lte/cdma/evdo networks: ? umts band 5, 6, 18, 19, & 26 ? umts band 2 & 25 ? cellular bc 0 and 10 ? pcs bc 1 and 14 product description ALT6725 addresses the demand for increased integration in dual-band handsets for lte networks. the small footprint 3 mm x 5 mm x 0.9 mm surface mount rohs compliant package contains independent rf pa paths to ensure optimal performance in both frequency bands in less board area than two single band pas. the package pinout was chosen to enable handset manufacturers to independently provide bias to both power amplifers and simplify control with common mode pins. the ALT6725 is part of anadigics 3rd generation of high-effciency-at- low-power (help3e?) family of power amplifers, which deliver low quiescent currents and signifcantly greater effciency through selectable bias modes for high, medium and low power operation. the ALT6725 is designed for use both with and without average power tracking (apt). apt can be used to optimize the vcc level for the desired output power level and linearity, which greatly reduces the total current drawn from the battery. this feature, in conjunction with selectable operating modes, enables signifcant improvements in overall power added effciency of the ALT6725 across the entire dynamic range of operating powers. apt requires use of an external variable voltage supply (dc-dc converter), which is used to provide the variable voltage to vcc pad of the amplifer. a low-leakage shutdown mode increases standby time. this pa has built-in directional couplers for each band, with a common coupler output port cpl_out. the 3 mm x 5 mm x 0.9 mm surface mount package incorporates matching networks optimized for output power, effciency and linearity in a 50 system. the device is manufactured on an advanced ingap hbt mmic technology offering state-of-the-art reliability, temperature stability, and ruggedness. figure 1: block diagram v en_cell v batt rf in_cell rf out_cell v cc a v mode1 1 13 11 14 12 3 4 2 gnd v cc 5 6 10 9 bias control voltage regulation cpl out rf out_pcs v en_pcs rf in_pcs gnd at slug (pad) 8 7 v mode2 gnd bias control voltage regulation cpl cpl 07/2012
2 table 1: pin description figure 2: pinout pin name description 1 v en_cell enable voltage for cell band 2 rf in_cell rf input for cell band 3 v mode1 mode control voltage 1 4 v batt battery voltage 5 v mode2 mode control voltage 2 6 rf in_pcs rf input for pcs band 7 v en_pcs enable voltage for pcs band 8 rf out_pcs rf output for pcs band 9 gnd ground 10 cpl out coupler output port 11 v cc a supply voltage a 12 v cc supply voltage 13 rf out_cell rf output for cell band 14 gnd ground v mode1 v mode2 cpl out preliminary data sheet - rev 1.0 07/2012 ALT6725 3 electrical characteristics table 2: absolute minimum and maximum ratings stresses in excess of the absolute ratings may cause permanent damage. functional operation is not implied under these conditions. exposure to absolute ratings for extended periods of time may adversely affect reliability. table 3: operating ranges the device may be operated safely over these conditions; however, parametric performance is guaranteed only over the conditions defned in the electrical specifcations. notes: (1) for operation at v cc = +3.2 v, p out is derated by 0.5 db. parameter min typ max units comments 2shudluhtxhfi 814 - - 849 1915 + 876%d 876%d 6sso9odh9 cc 9 cc a ) +3.4 +4.35 v %dhu9odh9 %77 ) +3.2 +3.4 +4.35 v (deoh9odh9 (1&( 9(13&6 ) +1.35 +1.8 +3.1 v pa on 3v h&uo9odh9 2( ) +1.35 +1.8 +3.1 v l+l l &hooodu5)2s3hu876 7(+3 7(3 7(3 26.7 (1) - - 27.5 15 9 - - - %p 765hou7( &hooodu5)2s3hu& &+3 &3 &3 27.5 (1) - - - - - %p &5& 3&65)2s3hu876 7(+3 7(3 7(3 26.5 (1) - - 27.3 15 9 - - - %p 765hou7( 3&65)2s3hu& &+3 &3 &3 27.5 (1) - - - - - %p &5& &dvh7hpshuduh7 c ) - c parameter min max unit 6xssorodh 77 cc 9 cc a) +5 v h&uo9odh9 2( 9 en ) +3.5 v 5)s3hu3 1 ) - %p 6udh7hpshuduh7 67 ) c preliminary data sheet - rev 1.0 07/2012 ALT6725 4 table 4: electrical specifcations C lte operation (band 5, 6, 18, 19 & 26) (10 mhz qpsk, 12 rb, start = 0) (t c = +25 c, v batt = v cc = +3.4 v, v en = +1.8 v, 50 system) parameter min typ max unit comments p out v mode1 v mode2 dl - - - 28 17 12 - - - % %p %p %p 9 1.8 v 1.8 v 9 9 1.8 v &5(875d+vh - - - -39.5 -42 -42 - - - % %p %p %p 9 1.8 v 1.8 v 9 9 1.8 v &5875d+vh - - - -42 -42 - - - % %p %p %p 9 1.8 v 1.8 v 9 9 1.8 v &5875d+vh - - - -62 -62 -58 - - - % %p %p %p 9 1.8 v 1.8 v 9 9 1.8 v 3huh(lh (1) - - - 35 16 8 - - - % %p %p %p 9 1.8 v 1.8 v 9 9 1.8 v 4lhvh&uuht %ldvh - 4 - ma u9 cc pin 1.8 v 1.8 v h&uo&uuh - - ma u9 mode slv9 2( = +1.8 v %77&uuh - 1.5 - ma u9 %77 9 2( = +1.8v (deoh&uuh - - ma u9 (1&( sl9 2( = +1.8 v 7dohhu&uuh v %77 l6ph - 7 - a v %77 99 cc 9 v (1&( 99 2( 9 +%7hdndh&uuh9 cc ) 6ph - <1 - ma v %77 99 cc 9 v (1&( 99 2( 9 1lvh5hhlh%d - -133 - %p+ ++ +duplv o o o - - - - -35 -35 % p out <%p spshhh - - 965 &sol)du - 22 - % 6sulv2shho doovsulvsv - - -65 % p out <%p edod965 2edod965 ssolhvhudooshudlllv dplvpdvuhvvl shupdhhuddludlouh - - 965 ssolhvhuooshudludh notes: (1) aclr and effciency measured at 836.5 mhz. preliminary data sheet - rev 1.0 07/2012 ALT6725 5 table 5: electrical specifcations - cellular band (bc 0, 10) (t c = +25 c, v batt = v cc = +3.4 v, v en_cell = +1.8 v, 50 ? system, cdma2000 rc-1 waveform) notes: (1) pae and acp measured at 836.5 mhz. pa rameterm in typm ax unit comments p out v mode1 v mode2 gain - - - 28 17 12 - - - db +28 dbm +16 dbm +10 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v adjacent channel power at 1.25 mhz of fset (1) primary channel bw = 1.23 mh z adjacent channel bw = 30 khz - - - -48.5 -52 -53.5 dbc +28 dbm +16 dbm +10 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v adjacent channel power at 1.98 mhz of fset (1) primary channel bw = 1.23 mh z adjacent channel bw = 30 khz - - - -58 -59 -68 dbc +28 dbm +16 dbm +10 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v (1) - - - 37.5 19.5 10 - - - % +28 dbm +16 dbm +10 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v quiescent current (icq) -4 -m a through v cc pins, v mode1,2 = +1.8 v mode control current - 0.5 -m a through v mode pin, v mode1,2 = +1.8 v ba tt current - 1.5 -m a through v ba tt pin , v mode1,2 = +1.8v enable current - 0.3 -m a through v en_cell pin, v mode1,2 = +1.8 v t otal decoder current on v ba tt (in shutdown mode) -7 - a v ba tt = +4.35 v, v cc = +4.35 v, v en_cell = 0 v, v mode1,2 = 0 v hbt leakage current (v cc ) (shutdown mode) -< 1- a v ba tt = +4.35 v, v cc = +4.35 v, v en_cell = 0 v, v mode1,2 = 0 v noise in receive band - -133 - dbm/hz 869 mhz to 894 mh z harmonics 2f o 3f o , 4f o - - - - -35 -35 dbc p out < +28 dbm input impedence - vswr coupling factor -2 2- db spurious output level (all spurious outputs) -- -65 dbc p out < +28 dbm in-band load vswr < 5:1 out-of-band load vswr < 10: 1 applies over all operating conditions load mismatch stress with no permanent degradation or failure 8:1 -- vswr applies over full operating range 2:5:1 - - - - - - - preliminary data sheet - rev 1.0 07/2012 ALT6725 6 table 6: electrical specifcations C lte operation (band 2 & 25) (10 mhz qpsk, 12 rb, start = 0) (t c = +25 c, v batt = v cc = +3.4 v, v en = +1.8 v, 50 system) parameter min typ max unit comments p out v mode1 v mode2 gain - - - 27 13 9 - - - db +27.3 dbm +15 dbm +9 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v aclr e-utra at 10 mhz offset - - - -37.5 -41 -40 - - - dbc +27.3 dbm +15 dbm +9 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v aclr utra at 7.5 mhz offset - - - -38 -41 -41 - - - dbc +27.3 dbm +15 dbm +9 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v aclr utra at 12.5 mhz offset - - - -63 -64 -64 - - - dbc +27.3 dbm +15 dbm +9 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v power-added effciency (1) - - - 34 17 8 - - - % +27.3 dbm +15 dbm +9 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v quiescent current (icq) low bias mode - 4 - ma through v cc pin 1.8 v 1.8 v mode control current - 0.5 - ma through v mode pins, v mode1,2 = +1.8 v batt current - 1.5 - ma through v batt , v mode1,2 = +1.8 v enable current - 0.3 - ma through v en_pcs , v mode1,2 = +1.8 v total decoder current on v batt (in shutdown mode) - 7 - a v batt = +4.35 v, v cc = +4.35 v, v en_cell = 0 v, v mode1,2 = 0 v hbt leakage current (v cc ) (shutdown mode) - <1 - ma v batt = +4.35 v, v cc = +4.35 v, v en_cell = 0 v, v mode1,2 = 0 v noise in receive band - -133 - dbm/hz 1930 mhz to 1990 mhz harmonics 2f o 3f o , 4f o - - - - -30 -30 dbc p out < +27.3 dbm input impedence - - 2:1 vswr coupling factor - 22 - db spurious output level (all spurious outputs) - - -65 dbc p out < +27.3 dbm in-band load vswr < 5:1 out-of-band load vswr < 10:1 applies over all operating conditions load mismatch stress with no permanent degradation or failure 8:1 - - vswr applies over full operating range notes: (1) aclr and effciency measured at 1880 mhz. preliminary data sheet - rev 1.0 07/2012 ALT6725 7 table 7: electrical specifcations - pcs band (bc 1, 14) (t c = +25 c, v batt = v cc = +3.4 v, v en_pcs = +1.8 v, 50 ? system, cdma2000 rc-1 waveform) notes: (1) acprs and effciency measured at 1880 mhz. parameter min typ max unit comments p out v mode1 v mode2 gain - - - 27 13 9 - - - db +28 dbm +16 dbm +10 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v adjacent channel power at 1.25 mhz offset (1) primary channel bw = 1.23 mhz adjacent channel bw = 30 khz - - - -48 -52.5 -53 - - - dbc +28 dbm +16 dbm +10 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v adjacent channel power at 1.98 mhz offset (1) primary channel bw = 1.23 mhz adjacent channel bw = 30 khz - - - -55 -60 -63 - - - dbc +28 dbm +16 dbm +10 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v power-added effciency (1) - - - 37 20 10 - - - % +28 dbm +16 dbm +10 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v quiescent current (icq) - 4 - ma through v cc pins, v mode1,2 = +1.8 v mode control current - 0.5 - ma through v mode pin, v mode1,2 = +1.8 v batt current - 1.5 - ma through v batt pin , v mode1,2 = +1.8v enable current - 0.3 - ma through v en_pcs pin, v mode1,2 = +1.8 v total decoder current on v batt (in shutdown mode) - 7 - a v batt = +4.35 v, v cc = +4.35 v, v en_cell = 0 v, v mode1,2 = 0 v hbt leakage current on v cc (in shutdown mode) - <1 - a v batt = +4.35 v, v cc = +4.35 v, v en_cell = 0 v, v mode1,2 = 0 v noise in receive band - -133 - dbm/hz 1930 mhz to 1990 mhz harmonics 2f o 3f o , 4f o - - - - -30 -30 dbc p out < +28 dbm input impedence - - 2:1 vswr coupling factor - 22 - db spurious output level (all spurious outputs) - - -65 dbc p out < +28 dbm in-band load vswr < 5:1 out-of-band load vswr < 10:1 applies over all operating conditions load mismatch stress with no permanent degradation or failure 8:1 - - vswr applies over full operating range preliminary data sheet - rev 1.0 07/2012 ALT6725 8 application information to ensure proper performance, refer to all related application notes on the anadigics web site: http:// www.anadigics.com along with figure 3, which shows the recommended on/off timing sequence for rf in , control voltages, and supply voltages. shutdown mode the power amplifer may be placed in a shutdown table 8: bias control mode by applying logic low levels (see operating ranges table) to the v enable and v mode pads. bias modes the power amplifer may be placed in low, medium, or high bias modes by applying the appropriate logic level (see operating ranges table) to the v mode pin. the bias control table lists the recommended modes of operation for various applications. ap pl ic at ion p ou t l evels bi as mo de v e n_cell v mo de 1 v mo de 2 v cc v ba tt low bi as m ode < +9 db m low +1 .8 v+ 1. 8+ 1. 8 v 0.8 - 4. 35 v> 3. 2 v m edi um bi as m ode > +9 db m < +1 5 db m m edi um +1 .8 v+ 1. 8 v0 v 0.8 - 4. 35 v> 3. 2 v hi gh bi as m ode > +1 5 db mh ig h+ 1. 8 v0 v0 v 1.3 - 4. 35 v> 3. 2 v s hut dow n- s hut dow n0 v0 v0 v3 .2 - 4. 35 v> 3. 2 v v e n_pcs v en_cell, pcs v cc/ v cc a note 1 rf in_cell, pcs notes 1,2 off sequence referenced after 90 % of rise time referenced before 10 % of fall time on sequence on sequence start t_ 0n = 0 t_ 0n +1 s t_ 0n +3 s off sequence start t_ 0f f = 0 t_ 0f f+ 2 st _0 ff +3 s vcontrols venable/vmode(s ) rise/fall max 1 s defined at 10% to 90% of min/max voltage figure 3: recommended on/off timing sequence notes: (1) level might be changed after rf is on. (2) rf off defned as p in -30 dbm. (3) switching simultaneously between v mode and v en is not recommended. preliminary data sheet - rev 1.0 07/2012 ALT6725 9 figure 4: application circuit 1 13 11 14 12 3 4 2 5 6 10 9 bias control voltage regulation cpl out gnd at slug (pad) 8 7 bias control voltage regulation cpl cpl rf in_cell rf in_pcs v mode1 v batt v en_cell v en_pcs 2.2 f v mode2 68pf v cc 1000 pf 2.2 f rf out_cell rf out_pcs 68 pf v cc a preliminary data sheet - rev 1.0 07/2012 ALT6725 10 package outline figure 5: package outline - 14 pin 3 mm x 5 mm x 1 mm surface mount module figure 6: branding specifcation 6725 llllnn pin 1 identifier c ountr y co de(c c) pa rt number l ot number date co de y y= y ear ww= wo rk w eek yy wwc c preliminary data sheet - rev 1.0 07/2012 ALT6725 11 figure 7: pcb board design guidelines pcb board design guidelines refer to figure 7 for the recommended pcb metal design, soldermask design, and stencil print patterns when assembling with anadigics modules [5]. it is important to note that the pcb metal design is dependent upon several factors: the electrical and thermal performance requirements of the product, and the pcb-to-device interconnect pattern. the pcb metal design recommendations primarily deal with te pcb-to-device interconnection. specifc board-level electrical and thermal performance re - quirements will be dictated by the physical geometry of the specifc application and are the responsibility of the end product manufacturer. preliminary data sheet - rev 1.0 07/2012 ALT6725 12 figure 8: carrier tape drawing figure 9: reel drawing dimensioning and tolerancing per asme y14.5m-1994 made in us a notes: 1. surface resistivity: material: black carbon polystyrene 1x10 to 1x10 ohms/squar e 4 1 00% f u l l 7 5 % 5 0 % 25 % 5 (2x)slot 3.0.1 (3x)1.78.25 ?20.60.13 ?13.00. 2 12.4. ?177.8 min . ?54.2 0.1 ?50.8 0.2 center hole detai l enlarged for clarit y dimensions are in millimeters preliminary data sheet - rev 1.0 07/2012 ALT6725 13 ordering information or der num be r te mp er at ure ra ng e pa cka ge d escri pt ion co mp on ent pa ckagin g al t6725q 7- 30 c to + 90 c ro hs co mp li an t 14 pi n 3 mm x 5 mm x 0. 9 mm su rf ace mo unt mo du le ta pe an d r eel , 2500 pi eces per r eel al t6725p 9- 30 c to + 90 c ro hs co mp li an t 14 pi n 3 mm x 5 mm x 0. 9 mm su rf ace mo unt mo du le pa rt ia l t ape an d re el warning anadigics products are not intended for use in life support appliances, devices or systems. use of an anadigics product in any such application without written consent is prohibited. import ant notice anadigics, inc. 141 mount bethel road warren, new jersey 07059, u.s.a. tel: +1 (908) 668-5000 fax: +1 (908) 668-5132 url: http://www.anadigics.com anadigics, inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. the product specifcations contained in advanced product information sheets and preliminary data sheets are subject to change prior to a products formal introduction. information in data sheets have been carefully checked and are assumed to be reliable; however, anadigics assumes no responsibilities for inaccuracies. anadigics strongly urges customers to verify that the information they are using is current before placing orders. preliminary data sheet - rev 1.0 07/2012 ALT6725 |
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