cystech electronics corp. spec. no. : c800n3 issued date : 2010.07.19 revised date : 2013.10.14 page no. : 1/8 MTNK5N3 cystek product specification esd protected n-channel en hancement mode mosfet MTNK5N3 bv dss 30v i d 100ma r dson(max) 8 description ? low voltage drive(2.5v drive) makes th is device ideal for portable equipment. ? high speed switching ? esd protected device ? pb-free lead plating & halogen-free package symbol outline ordering information device package shipping MTNK5N3-0-t1-g sot-23 (pb-free lead plating and halogen-free package) 3000 pcs / tape & reel sot-23 MTNK5N3 d d g g s g gate s source drain d s environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t1 : 3000 pc s / tape & reel,7? reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c800n3 issued date : 2010.07.19 revised date : 2013.10.14 page no. : 2/8 MTNK5N3 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage bv dss 30 v gate-source voltage v gs 20 v continuous drain current i d 100 ma pulsed drain current (t a =25 c) i dm 400 *1 ma total power dissipation p d 300 *2 mw esd susceptibility 750 *3 v operating junction and storage temperature range tj ; tstg -55~+150 c thermal resistance, junction-to-ambient rth,ja 556 c/w thermal performance parameter symbol limit unit thermal resistance, junction-to-ambie nt, max rth,ja 417 *2 c/w note: *1. pulse width 10 s, duty cycle 1% *2. when device mounted on a fr-4 board with minimum pad size. *3. human body model, 1.5k in series with 100pf electrical characteristics (ta=25 c) symbol min. typ. max. unit test conditions static bv dss 30 - - v v gs =0, i d =100 a v gs(th) 0.8 1.3 1.5 v v ds =3v, i d =100 a i gss - - 1 a v gs = 20v, v ds =0 i dss - - 100 na v ds =30v, v gs =0 - 3.4 8 v gs =4v, i d =10ma r ds(on) - 6.9 13 v gs =2.5v, i d =1ma g fs 20 50 - ms v ds =3v, i d =10ma dynamic c iss - 12.5 - c oss - 7.3 - c rss - 3.5 - pf v ds =5v, v gs =0, f=1mhz t d(on) - 15 - t r - 35 - t d(off) - 75 - t f - 75 - ns v dd P 5v, i d =10ma, v gs =5v, r l =500 , r g =10 source-drain diode *v sd - 0.88 1.2 v v gs =0v, i s =100ma *pulse test : pulse width 300 s, duty cycle 2%
cystech electronics corp. spec. no. : c800n3 issued date : 2010.07.19 revised date : 2013.10.14 page no. : 3/8 MTNK5N3 cystek product specification typical characteristics typical output characteristics 0 0.05 0.1 0.15 0123 4 gate threshold voltage vs channel temperature 0 0.5 1 1.5 2 -50 -25 0 25 50 75 100 125 150 channel temperature---tch(c) gate threshold voltage---v gs (th)(v) 4v 3.5 v 3v t a =25c drain-source voltage ---v ds (v) drain current --- i d (a) 2.5v 2v vgs=1.5v typical transfer characteristics 0 50 100 150 200 01234 gate-source voltage---v gs (v) drain current ---i d (ma) v ds =3v 25c 125c 75c static drain-source on-state resistance with temperature 2 3 4 5 -50 -25 0 25 50 75 100 125 150 channel temperature---tch(c) static drain-source on-state resistance() i d =50ma i d =100ma v gs =4v static drain-source on-state resistance vs drain current 1 2 3 4 5 6 7 8 9 10 1 10 100 1000 drain current---i d (ma) static drain-source on-state resistance--- r ds (on)() v gs =2.5v v gs =4v t a =25c static drain-source on-state resistance vs drain current 1 2 3 4 5 6 7 8 9 10 1 10 100 1000 drain current---i d (ma) static drain-source on-state resistance--- r ds( on) () v gs =4v v gs =2.5v t a =125c
cystech electronics corp. spec. no. : c800n3 issued date : 2010.07.19 revised date : 2013.10.14 page no. : 4/8 MTNK5N3 cystek product specification typical characteristics(cont.) static drain-source on-state resistance vs drain current 1 10 100 1 10 100 1000 drain current---i d (ma) static drain-source on-state resistance- r ds( on) () ta=25c ta=125c ta=75c v gs =2.5v static drain-source on-state resistance vs drain current 1 10 1 10 100 1000 drain current---i d (ma) static drain-source on-state resistance- r ds( on) () ta=25c ta=125c ta=75c v gs =4v static drain-source on-state resistance vs gate-source voltage 0 1 2 3 4 5 6 7 8 9 10 024681 0 static drain-source on-state resistance vs gate-source voltage 0 1 2 3 4 5 6 7 8 9 10 024681 gate-source voltage---v gs (v) static drain-source on-state resistance---r ds( on) () gate-source voltage---v gs (v) static drain-source on-state resistance---r ds( on) () id=50ma ta=75c ta=125c ta=25c 0 ta=25c id=100ma ta=125c ta=75c reverse drain current vs source-drain voltage(i) 0.1 1 10 100 1000 00 . 511 . 5 reverse drain current vs source-drain voltage(ii) 0.1 1 10 100 1000 00 . 511 source-drain voltage-v sd (v) reverse drain current-i dr (ma) source-drain voltage-v sd (v) reverse drain current-i dr (ma) t a =25c t a =75c . 5 v gs =0v v gs =4v t a =125c
cystech electronics corp. spec. no. : c800n3 issued date : 2010.07.19 revised date : 2013.10.14 page no. : 5/8 MTNK5N3 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 1 10 100 01 02 0 3 0 foreward transfer admittance vs drain current 1 10 100 1000 1 10 100 1000 drain current---i d (ma) forward transfer admittance--- y fs (ms) v ds =3v ta=25c drain-source voltage---v ds (v) capacitance---(pf) ciss ta=75c c oss ta=125c crss recommended soldering footprint
cystech electronics corp. spec. no. : c800n3 issued date : 2010.07.19 revised date : 2013.10.14 page no. : 6/8 MTNK5N3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c800n3 issued date : 2010.07.19 revised date : 2013.10.14 page no. : 7/8 MTNK5N3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 5 +1/-1 seconds 260 +0/-5 c recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c800n3 issued date : 2010.07.19 revised date : 2013.10.14 page no. : 8/8 MTNK5N3 cystek product specification sot-23 dimension inches millimeters inches millimeters marking: xx style : pin 1.gate 2.source 3.drain 3-lead sot-23 plastic surface mounted package cystek package code: n3 kn device code dim min. max. min. max. dim min. max. min. max. a 0.1102 0.1204 2.80 3.04 j 0.0032 0.0079 0.08 0.20 b 0.0472 0.0669 1.20 1.70 k 0. 0118 0.0266 0.30 0.67 c 0.0335 0.0512 0.89 1.30 l 0.0335 0.0453 0.85 1.15 d 0.0118 0.0197 0.30 0.50 s 0.0830 0.1161 2.10 2.95 g 0.0669 0.0910 1.70 2.30 v 0.0098 0.0256 0.25 0.65 h 0.0000 0.0040 0.00 0.10 l1 0. 0118 0.0197 0.30 0.50 notes : 1.controlling dimension : millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material : ? lead : pure tin plated. ? mold compound : epoxy resin family, flammability solid burning class:ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . date code
|
