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www.irf.com 1 7/10/09 IRF8910GPBF hexfet power mosfet notes through are on page 10 so-8 benefits very low r ds(on) at 4.5v v gs ultra-low gate impedance fully characterized avalanche voltage and current 20v v gs max. gate rating d1 d1 d2 d2 g1 s2 g2 s1 top view 8 1 2 3 4 5 6 7 applications dual so-8 mosfet for pol converters in desktop, servers, graphics cards, game consoles and set-top box lead-free halogen-free v dss r ds(on) max i d 20v 13.4m @v gs = 10v 10a absolute maximum ratings parameter units v ds drain-to-source voltage v v gs gate-to-source voltage i d @ t a = 25c continuous drain current, v gs @ 10v i d @ t a = 70c continuous drain current, v gs @ 10v a i dm pulsed drain current p d @t a = 25c power dissipation w p d @t a = 70c power dissipation linear derating factor w/c t j operating junction and c t stg storage temperature range thermal resistance parameter typ. max. units r jl junction-to-drain lead ??? 42 c/w r ja junction-to-ambient ??? 62.5 max. 10 8.3 82 20 20 -55 to + 150 2.0 0.016 1.3
2 www.irf.com s d g static @ t j = 25c (unless otherwise specified) parameter min. t y p. max. units bv dss drain-to-source breakdown voltage 20 ??? ??? v ? v dss / ? t j breakdown voltage temp. coefficient ??? 0.015 ??? v/c r ds(on) static drain-to-source on-resistance ??? 10.7 13.4 m ? ??? 14.6 18.3 v gs(th) gate threshold voltage 1.65 ??? 2.55 v ? v gs(th) / ? t j gate threshold voltage coefficient ??? -4.8 ??? mv/c i dss drain-to-source leakage current ??? ??? 1.0 a ??? ??? 150 i gss gate-to-source forward leakage ??? ??? 100 na gate-to-source reverse leakage ??? ??? -100 gfs forward transconductance 24 ??? ??? s q g total gate charge ??? 7.4 11 q gs1 pre-vth gate-to-source charge ??? 2.4 ??? q gs2 post-vth gate-to-source charge ??? 0.80 ??? nc q gd gate-to-drain charge ??? 2.5 ??? q godr gate charge overdrive ??? 1.7 ??? see fig. 6 q sw switch char g e (q gs2 + q gd ) ??? 3.3 ??? q oss output charge ??? 4.4 ??? nc t d(on) turn-on delay time ??? 6.2 ??? t r rise time ???10??? ns t d(off) turn-off delay time ??? 9.7 ??? t f fall time ??? 4.1 ??? c iss input capacitance ??? 960 ??? c oss output capacitance ??? 300 ??? pf c rss reverse transfer capacitance ??? 160 ??? avalanche characteristics parameter units e as si n gl e p u l se a va l anc h e e ner gy mj i ar a va l anc h e c urrent a diode characteristics parameter min. t y p. max. units i s continuous source current ??? ??? 2.5 (body diode) a i sm pulsed source current ??? ??? 82 (body diode) v sd diode forward voltage ??? ??? 1.0 v t rr reverse recovery time ??? 17 26 ns q rr reverse recovery charge ??? 6.5 9.7 nc ??? i d = 8.2a v gs = 0v v ds = 10v v gs = 4.5v, i d = 8.0a v gs = 4.5v typ. ??? v ds = v gs , i d = 250a clamped inductive load v ds = 10v, i d = 8.2a v ds = 16v, v gs = 0v, t j = 125c t j = 25c, i f = 8.2a, v dd = 10v di/dt = 100a/ s t j = 25c, i s = 8.2a, v gs = 0v showing the integral reverse p-n junction diode. mosfet symbol v ds = 10v, v gs = 0v v dd = 10v, v gs = 4.5v i d = 8.2a v ds = 10v v gs = 20v v gs = -20v v ds = 16v, v gs = 0v conditions v gs = 0v, i d = 250a reference to 25c, i d = 1ma v gs = 10v, i d = 10a conditions max. 19 8.2 ? = 1.0mhz www.irf.com 3 fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.01 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 10v 8.0v 5.5v 4.5v 3.5v 3.0v 2.8v bottom 2.5v 60s pulse width tj = 25c 2.5v 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 2.5v 60s pulse width tj = 150c vgs top 10v 8.0v 5.5v 4.5v 3.5v 3.0v 2.8v bottom 2.5v 1 2 3 4 5 6 v gs , gate-to-source voltage (v) 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) t j = 25c t j = 150c v ds = 10v 60s pulse width -60 -40 -20 0 20 40 60 80 100 120 140 160 t j , junction temperature (c) 0.5 1.0 1.5 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 10a v gs = 10v 4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 1 10 100 v ds , drain-to-source voltage (v) 100 1000 10000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 012345678910 q g total gate charge (nc) 0.0 1.0 2.0 3.0 4.0 5.0 6.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 16v v ds = 10v i d = 8.2a 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 v sd , source-to-drain voltage (v) 0.01 0.10 1.00 10.00 100.00 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 150c v gs = 0v 0 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 1msec 10msec operation in this area limited by r ds (on) 100sec t a = 25c tj = 150c single pulse www.irf.com 5 fig 11. maximum effective transient thermal impedance, junction-to-ambient fig 9. maximum drain current vs. ambient temperature fig 10. threshold voltage vs. temperature 25 50 75 100 125 150 t a , ambient temperature (c) 0 1 2 3 4 5 6 7 8 9 10 i d , d r a i n c u r r e n t ( a ) 1e-006 1e-005 0.0001 0.001 0.01 0.1 1 10 100 t 1 , rectangular pulse duration (sec) 0.01 0.1 1 10 100 t h e r m a l r e s p o n s e ( z t h j a ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthja + tc j j 1 1 2 2 3 3 r 1 r 1 r 2 r 2 r 3 r 3 ci= i / ri ci= i / ri 4 4 r 4 r 4 c c 5 5 r 5 r 5 ri (c/w) i (sec) 1.2647 0.000091 2.0415 0.000776 18.970 0.188739 23.415 0.757700 16.803 25.10000 -75 -50 -25 0 25 50 75 100 125 150 t j , temperature ( c ) 1.0 1.5 2.0 2.5 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 250a 6 www.irf.com fig 13. maximum avalanche energy vs. drain current fig 16. switching time test circuit fig 17. switching time waveforms fig 12. on-resistance vs. gate voltage d.u.t. v ds i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + - fig 15. gate charge test circuit fig 14. unclamped inductive test circuit and waveform t p v (br)dss i as r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v vgs v gs pulse width < 1s duty factor < 0.1% v dd v ds l d d.u.t + - v gs v ds 90% 10% t d(on) t d(off) t r t f 25 50 75 100 125 150 starting t j , junction temperature (c) 0 10 20 30 40 50 60 70 80 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 3.4a 4.9a bottom 8.2a 3 4 5 6 7 8 9 10 v gs, gate -to -source voltage (v) 0.00 10.00 20.00 30.00 40.00 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( m ? ) i d = 10a t j = 125c t j = 25c www.irf.com 7 fig 15. for n-channel hexfet power mosfets ? ? ? p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - ? ? !"!! ? # $$ ? !"!!%" fig 16. gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr 8 www.irf.com control fet !" # $ %& !" # #' p loss = p conduction + p switching + p drive + p output this can be expanded and approximated by; p loss = i rms 2 r ds(on ) () + i q gd i g v in f ? ? ? ? ? ? + i q gs 2 i g v in f ? ? ? ? ? ? + q g v g f () + q oss 2 v in f ? ? ? ? " ( %& !" %& !" " ) # * %+ %& !" # # , # - . / # # synchronous fet the power loss equation for q2 is approximated by; p loss = p conduction + p drive + p output * p loss = i rms 2 r ds(on) () + q g v g f () + q oss 2 v in f ? ? ? ? ? + q rr v in f ( ) *dissipated primarily in q1. for the synchronous mosfet q2, r ds(on) is an im- portant characteristic; however, once again the im- portance of gate charge must not be overlooked since it impacts three critical areas. under light load the mosfet must still be turned on and off by the con- trol ic so the gate drive losses become much more significant. secondly, the output charge q oss and re- verse recovery charge q rr both generate losses that are transfered to q1 and increase the dissipation in that device. thirdly, gate charge will impact the mosfets? susceptibility to cdv/dt turn on. the drain of q2 is connected to the switching node of the converter and therefore sees transitions be- tween ground and v in . as q1 turns on and off there is a rate of change of drain voltage dv/dt which is ca- pacitively coupled to the gate of q2 and can induce a voltage spike on the gate that is sufficient to turn the mosfet on, resulting in shoot-through current . the ratio of q gd /q gs1 must be minimized to reduce the potential for cdv/dt turn on. power mosfet selection for non-isolated dc/dc converters figure a: q oss characteristic www.irf.com 9 so-8 package outline (mosfet & fetky) !" ## $%$ ! ! ! $$ & ! dimensions are shown in milimeters (inches) so-8 part marking information note: for the most current drawing please refer to ir website at http://www.irf.com/package/ |