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amplifier transistors npn silicon maximum ratings rating symbol 6428lt1 6429lt1 unit collectoremitter voltage v ceo 50 45 vdc collectorbase voltage v cbo 60 55 vdc emitterbase voltage v ebo 6.0 vdc collector current e continuous i c 200 madc thermal characteristics characteristic symbol max unit total device dissipation fr5 board (1) t a = 25 c derate above 25 c p d 225 1.8 mw mw/ c thermal resistance, junction to ambient r ja 556 c/w total device dissipation alumina substrate, (2) t a = 25 c derate above 25 c p d 300 2.4 mw mw/ c thermal resistance, junction to ambient r ja 417 c/w junction and storage temperature t j , t stg 55 to +150 c device marking mmbt6428lt1 = 1km; mmbt6429lt1 = 1l electrical characteristics (t a = 25 c unless otherwise noted) characteristic symbol min max unit off characteristics collectoremitter breakdown voltage (i c = 1.0 madc, i b = 0) mmbt6428 (i c = 1.0 madc, i b = 0) mmbt6429 v (br)ceo 50 45 e e vdc collectorbase breakdown voltage (i c = 0.1 madc, i e = 0) mmbt6428 (i c = 0.1 madc, i e = 0) mmbt6429 v (br)cbo 60 55 e e vdc collector cutoff current (v ce = 30 vdc) i ces e 0.1 m adc collector cutoff current (v cb = 30 vdc, i e = 0) i cbo e 0.01 m adc emitter cutoff current (v eb = 5.0 vdc, i c = 0) i ebo e 0.01 m adc 1. fr5 = 1.0 0.75 0.062 in. 2. alumina = 0.4 0.3 0.024 in. 99.5% alumina. on semiconductor ? semiconductor components industries, llc, 2001 november, 2001 rev. 2 1 publication order number: mmbt6428lt1/d mmbt6428lt1 mmbt6429lt1 1 2 3 case 31808, style 6 sot23 (to236) collector 3 1 base 2 emitter
mmbt6428lt1 mmbt6429lt1 http://onsemi.com 2 electrical characteristics (t a = 25 c unless otherwise noted) (continued) characteristic symbol min max unit on characteristics dc current gain (i c = 0.01 madc, v ce = 5.0 vdc) mmbt6428 mmbt6429 (i c = 0.1 madc, v ce = 5.0 vdc) mmbt6428 mmbt6429 (i c = 1.0 madc, v ce = 5.0 vdc) mmbt6428 mmbt6429 (i c = 10 madc, v ce = 5.0 vdc) mmbt6428 mmbt6429 h fe 250 500 250 500 250 500 250 500 e e 650 1250 e e e e e collectoremitter saturation voltage (i c = 10 madc, i b = 0.5 madc) (i c = 100 madc, i b = 5.0 madc) v ce(sat) e e 0.2 0.6 vdc baseemitter on voltage (i c = 1.0 madc, v ce = 5.0 madc) v be(on) 0.56 0.66 vdc smallsignal characteristics currentgain e bandwidth product (i c = 1.0 madc, v ce = 5.0 vdc, f = 100 mhz) f t 100 700 mhz output capacitance (v cb = 10 vdc, i e = 0, f = 1.0 mhz) c obo e 3.0 pf input capacitance (v eb = 0.5 vdc, i c = 0, f = 1.0 mhz) c ibo e 8.0 pf r s i n e n ideal transistor figure 1. transistor noise model mmbt6428lt1 mmbt6429lt1 http://onsemi.com 3 figure 2. effects of frequency f, frequency (hz) 7.0 10 20 30 5.0 figure 3. effects of collector current i c , collector current (ma) figure 4. noise current f, frequency (hz) figure 5. wideband noise figure r s , source resistance (ohms) 3.0 10 noise characteristics (v ce = 5.0 vdc, t a = 25 c) noise voltage e n , noise voltage (nv) e n , noise voltage (nv) i n , noise current (pa) nf, noise figure (db) 20 50 100 200 500 1k 2k 5k 10k 20k 50k 100k bandwidth = 1.0 hz bandwidth = 1.0 hz bandwidth = 1.0 hz i c = 10 ma 300 m a 30 m a r s 0 3.0 ma 1.0 ma 7.0 10 20 30 5.0 3.0 0.01 0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 r s 0 f = 10 hz 100 hz 1.0 khz 10 khz 100 khz i c = 10 ma 3.0 ma 1.0 ma 300 m a 100 m a 10 m a r s 0 10 10 20 50 100 200 500 1k 2k 5k 10k 20k 50k 100k 0.1 0.2 0.3 1.0 0.7 2.0 3.0 5.0 7.0 10 20 50 100 200 500 1k 2k 5k 10k 20k 50k 100k 0 4.0 8.0 12 16 20 bandwidth = 10 hz to 15.7 khz i c = 1.0 ma 500 m a 100 m a 10 m a 100 hz noise data 300 200 100 3.0 5.0 7.0 10 20 30 50 70 r s , source resistance (ohms) 10 20 50 100 200 500 1k 2k 5k 10k 20k 50k 100k v t , total noise voltage (nv) nf, noise figure (db) 0 4.0 8.0 12 16 20 figure 6. total noise voltage bandwidth = 1.0 hz i c = 10 ma 3.0 ma 1.0 ma 300 m a 100 m a 30 m a 10 m a 10 20 50 100 200 500 1k 2k 5k 10k 20k 50k 100k i c = 10 ma 300 m a 100 m a 30 m a 3.0 ma 1.0 ma 10 m a bandwidth = 1.0 hz r s , source resistance (ohms) figure 7. noise figure 0.5 mmbt6428lt1 mmbt6429lt1 http://onsemi.com 4 figure 8. dc current gain i c , collector current (ma) 0.4 1.0 2.0 3.0 4.0 0.3 0.01 h , dc current gain (normalized) 0.05 2.0 3.0 10 0.02 0.03 0.2 1.0 0.1 5.0 fe v ce = 5.0 v t a = 125 c 25 c -55 c 0.7 0.5 0.5 0.2 0.3 0.01 0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 100 figure 9. aono voltages i c , collector current (ma) 0.4 0.6 0.8 1.0 0.2 figure 10. temperature coefficients i c , collector current (ma) v, voltage (volts) 0.01 0 -0.8 -1.2 -1.6 -2.4 t j = 25 c v ce(sat) @ i c /i b = 10 v be @ v ce = 5.0 v t j = 25 c to 125 c -55 c to 25 c r vbe , base-emitter q temperature coefficient (mv/ c) -0.4 -2.0 0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 100 f t , current-gain bandwidth product (mhz) c, capacitance (pf) 8.0 0.8 1.0 2.0 3.0 4.0 6.0 0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 100 t j = 25 c c cb c ob c eb c ib 1.0 2.0 5.0 3.0 7.0 10 20 30 50 70 100 500 300 200 70 50 100 v ce = 5.0 v t j = 25 c figure 11. capacitance v r , reverse voltage (volts) figure 12. currentgain e bandwidth product i c , collector current (ma) mmbt6428lt1 mmbt6429lt1 http://onsemi.com 5 the values for the equation are found in the maximum ratings table on the data sheet. substituting these values into the equation for an ambient temperature t a of 25 c, one can calculate the power dissipation of the device which in this case is 225 milliwatts. information for using the sot23 surface mount package minimum recommended footprint for surface mounted applications surface mount board layout is a critical portion of the total design. the footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. with the correct pad geometry, the packages will self align when subjected to a solder reflow process. sot23 mm inches 0.037 0.95 0.037 0.95 0.079 2.0 0.035 0.9 0.031 0.8 sot23 power dissipation p d = t j(max) t a r q ja p d = 150 c 25 c 556 c/w = 225 milliwatts the power dissipation of the sot23 is a function of the pad size. this can vary from the minimum pad size for soldering to a pad size given for maximum power dissipa- tion. power dissipation for a surface mount device is deter- mined by t j(max) , the maximum rated junction temperature of the die, r q ja , the thermal resistance from the device junction to ambient, and the operating temperature, t a . using the values provided on the data sheet for the sot23 package, p d can be calculated as follows: the 556 c/w for the sot23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milli- watts. there are other alternatives to achieving higher power dissipation from the sot23 package. another alternative would be to use a ceramic substrate or an aluminum core board such as thermal clad ? . using a board material such as thermal clad, an aluminum core board, the power dissipation can be doubled using the same footprint. soldering precautions the melting temperature of solder is higher than the rated temperature of the device. when the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. there- fore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. ? always preheat the device. ? the delta temperature between the preheat and soldering should be 100 c or less.* ? when preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. when using infrared heating with the reflow soldering method, the difference shall be a maximum of 10 c. ? the soldering temperature and time shall not exceed 260 c for more than 10 seconds. ? when shifting from preheating to soldering, the maximum temperature gradient shall be 5 c or less. ? after soldering has been completed, the device should be allowed to cool naturally for at least three minutes. gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. ? mechanical stress or shock should not be applied during cooling. * soldering a device without preheating can cause exces- sive thermal shock and stress which can result in damage to the device. mmbt6428lt1 mmbt6429lt1 http://onsemi.com 6 package dimensions case 31808 issue af sot23 (to236) d j k l a c b s h g v 3 1 2 dim a min max min max millimeters 0.1102 0.1197 2.80 3.04 inches b 0.0472 0.0551 1.20 1.40 c 0.0350 0.0440 0.89 1.11 d 0.0150 0.0200 0.37 0.50 g 0.0701 0.0807 1.78 2.04 h 0.0005 0.0040 0.013 0.100 j 0.0034 0.0070 0.085 0.177 k 0.0140 0.0285 0.35 0.69 l 0.0350 0.0401 0.89 1.02 s 0.0830 0.1039 2.10 2.64 v 0.0177 0.0236 0.45 0.60 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. style 6: pin 1. base 2. emitter 3. collector mmbt6428lt1 mmbt6429lt1 http://onsemi.com 7 notes mmbt6428lt1 mmbt6429lt1 http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mmbt6428lt1/d thermal clad is a trademark of the bergquist company. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada |
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