st3401m23rg p channel enhancement mode mosfet 4.0a stanson technology 120 bentley square, mountain view, ca 94040 usa http://www.stansontech.com stp3401m23rg 2005. v1 description st3401m23rg is the pchannel logic enhancement mode power field effect transistor which is produced using high cell density dmos tren ch technology. this high density process is especially tailored to minimize onstate resistance. these devices are particularly suited for low voltage application suc h as cellular phone and notebook computer power management, other battery powered ci rcuits, and low inline power loss are required. the product is in a very small o utline surface mount package. pin configuration sot-23-3l 1.gate 2.source 3.drain part marking sot-23-3l y: year code a: process code feature - 30v/4.0a, r ds(on) = 53m (typ.) @v gs = 10v 30v/3.2a, r ds(on) = 60m @v gs = 4.5v super high density cell design for extremely low r ds(on) exceptional onresistance and maximum dc current capability sot233l package design 3 1 2 d g s 3 1 2 a1ya
st3401m23rg p channel enhancement mode mosfet 4.0a stanson technology 120 bentley square, mountain view, ca 94040 usa http://www.stansontech.com stp3401m23rg 2005. v1 absoulte maximum ratings (ta = 25 unless otherwise noted ) parameter symbol typical unit drainsource voltage v dss 30 v gatesource voltage v gss 12 v continuous drain currenttj=150 ) t a =25 t a =70 i d 4.0 3.2 a pulsed drain current i dm 15 a continuous source current (diode conduction) i s 1.0 a power dissipation t a =25 t a =70 p d 1.25 0.8 w operation junction temperature t j 150 storage temperature range t stg 55/150 thermal resistancejunction to ambient r ja 120 /w
st3401m23rg p channel enhancement mode mosfet 4.0a stanson technology 120 bentley square, mountain view, ca 94040 usa http://www.stansontech.com stp3401m23rg 2005. v1 electrical characteristics ( ta = 25 unless otherwise noted ) parameter symbol condition min typ max unit static drainsource breakdown voltage v (br)dss v gs =0v,i d =250ua 30 v gate threshold voltage v gs(th) v ds =v gs ,i d =250ua 0.4 1.0 v gate leakage current i gss v ds =0v,v gs = 12v 100 na zero gate voltage drain current i dss v ds =24v,v gs =0v 1 ua v ds =24v,v gs =0v t j =55 10 onstate drain current i d(on) v ds Q 5v,v gs =4.5v 10 a drainsource onresistance r ds(on) v gs =10v,i d =4.0a v gs =4.5v,i d =3.2a 53 60 m forward transconductance g fs v ds =5v,i d =4.0v 10 s diode forward voltage v sd i s =1.0a,v gs =0v 0.8 1.2 v dynamic total gate charge q g v ds =15v v gs =10v i d 4.0a 14 21 nc gatesource charge q gs 1.9 gatedrain charge q gd 3.7 input capacitance c iss v ds =15v v gs =0v f=1mh z 540 pf output capacitance c oss 131 reverse transfer capacitance c rss 105 turnon time t d(on) tr v ds =15v v gs =15v i d =1a r l =6 r g =10 10 15 ns 15 25 turnoff time t d(off) tf 31 50 20 30
st3401m23rg p channel enhancement mode mosfet 4.0a stanson technology 120 bentley square, mountain view, ca 94040 usa http://www.stansontech.com stp3401m23rg 2005. v1 typical characterictics (25 unless noted)
st3401m23rg p channel enhancement mode mosfet 4.0a stanson technology 120 bentley square, mountain view, ca 94040 usa http://www.stansontech.com stp3401m23rg 2005. v1 typical characterictics (25 unless noted)
st3401m23rg p channel enhancement mode mosfet 4.0a stanson technology 120 bentley square, mountain view, ca 94040 usa http://www.stansontech.com stp3401m23rg 2005. v1 sot-23-3l package outline
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