apr. 2004 mitsubishi PM75RLB060 flat-base type insulated package PM75RLB060 feature a) adopting new 5th generation igbt (cstbt) chip, which performance is improved by 1 m fine rule process. for example, typical v ce (sat)=1.5v @tj=125 c b) i adopt the over-temperature conservation by tj detection of cstbt chip, and error output is possible from all each con- servation upper and lower arm of ipm. c) new small package reduce the package size by 32%, thickness by 22% from s-dash series. d) current rating of brake part increased. 67% for the current rating of inverter part. ?3 75a, 600v current-sense igbt type inverter ? 50a, 600v current-sense regenerative brake igbt ? monolithic gate drive & protection logic ? detection, protection & status indication circuits for, short- circuit, over-temperature & under-voltage (p-fo available from upper arm devices) ? acoustic noise-less 5.5kw/7.5kw class inverter application application general purpose inverter, servo drives and other motor controls package outlines dimensions in mm 22 7.75 98.25 2.5 23 23 23 19.5 25.75 25 55 17 16 3 19- 0.5 9.5 11.5 27.5 9.5 1 1 1.5 1.5 2- 2.5 106 0.25 66.5 19.75 3.25 7 4 4 35 4 4 4 44 44 44 4 16 15.25 6-2 3-2 3-2 3-2 16 16 120 1. vupc 2. ufo 3. up 4. vup1 5. vvpc 6. vfo 7. vp 8. vvp1 9. vwpc 10. wfo 11. wp 12. vwp1 13. vnc 14. vn1 15. br 16. un 17. vn 18. wn 19. fo terminal code np 15 buvw 91319 4- 2.5 mounting holes 2- 5.5
mitsubishi PM75RLB060 flat-base type insulated package apr. 2004 v ces i c i cp p c t j collector-emitter voltage collector current collector current (peak) collector dissipation junction temperature v d = 15v, v cin = 15v t c = 25 c t c = 25 c t c = 25 c (note-1) v a a w c maximum ratings (tj = 25 c, unless otherwise noted) inverter part symbol parameter condition ratings unit 600 75 150 297 C 20 ~ +150 internal functions block diagram v ces i c i cp p c v r(dc) i f t j brake part collector-emitter voltage collector current collector current (peak) collector dissipation fwdi rated dc reverse voltage fwdi forward current junction temperature v d = 15v, v cin = 15v t c = 25 c t c = 25 c t c = 25 c (note-1) t c = 25 c t c = 25 c v a a w v a c symbol parameter condition ratings unit 600 50 100 228 600 50 C 20 ~ +150 v fo i fo control part v ma 20 20 supply voltage input voltage fault output supply voltage fault output current symbol parameter condition ratings unit applied between : v up1 -v upc v vp1 -v vpc , v wp1 -v wpc , v n1 -v nc applied between : u p -v upc , v p -v vpc w p -v wpc , u n ? v n ? w n ? b r -v nc applied between : u fo -v upc , v fo -v vpc , w fo -v wpc f o -v nc sink current at u fo , v fo , w fo , f o terminals 20 20 v d v cin v v v n u n w p v wp1 wf o v wpc v p v vp1 vf o v vpc u p v up1 uf o v upc br bnwvup fo v nc v n1 w n gnd in fo vcc gnd si out ot gnd in fo vcc gnd si out ot gnd in fo vcc gnd si out ot gnd in fo vcc gnd si out ot gnd in fo vcc gnd si out ot gnd in fo vcc gnd si out ot gnd in fo vcc gnd si out ot
mitsubishi PM75RLB060 flat-base type insulated package apr. 2004 parameter symbol supply voltage protected by sc supply voltage (surge) module case operating temperature storage temperature isolation voltage condition v cc(surge) t c t stg v iso ratings v cc(prot) 400 500 C 20 ~ +100 C 40 ~ +125 2500 unit v c c v rms v v d = 13.5 ~ 16.5v, inverter part, t j = +125 c start applied between : p-n, surge value (note-1) 60hz, sinusoidal, charged part to base, ac 1 min. (note-1) tc (base plate) measurement point is below. 2.1 2.0 3.3 2.4 0.4 1.0 2.5 1.0 1 10 min. typ. max. collector-emitter saturation voltage collector-emitter cutoff current C i c = 75a, v d = 15v, v cin = 15v (fig. 2) t j = 25 c t j = 125 c electrical characteristics (tj = 25 c, unless otherwise noted) inverter part parameter symbol condition v ce(sat) i ces v ec t on t rr t c(on) t off t c(off) limits 0.5 1.6 1.5 2.2 1.0 0.2 0.4 1.2 0.5 t j = 25 c t j = 125 c fwdi forward voltage switching time v d = 15v, v cin = 0v ? 15v v cc = 300v, i c = 75a t j = 125 c inductive load (fig. 3,4) v ce = v ces , v cin = 15v (fig. 5) v d = 15v, i c = 75a v cin = 0v, pulsed (fig. 1) total system v ma v s unit 0.32* 0.53* 0.42* 0.71* 0.42 0.69 0.55 0.92 0.038 c/w r th(j-c)q r th(j-c)f r th(j-c)q r th(j-c)f r th(j-c)q r th(j-c)f r th(j-c)q r th(j-c)f r th(c-f) inverter igbt part (per 1/6) (note-2) inverter fwdi part (per 1/6) (note-2) brake igbt part (note-2) brake fwdi part (note-2) inverter igbt part (per 1/6) (note-1) inverter fwdi part (per 1/6) (note-1) brake igbt part (note-1) brake fwdi part (note-1) case to fin, (per 1 module) thermal grease applied (note-1) symbol condition unit min. junction to case thermal resistances thermal resistances contact thermal resistance parameter limits typ. max. up igbt 28.7 C 6.6 vp wp un vn wn br fwdi 28.7 0.8 igbt 65.2 C 6.6 fwdi 65.2 2.5 igbt 85.3 C 6.6 fwdi 85.3 2.5 igbt 38.0 4.6 fwdi 38.0 C 4.5 igbt 55.4 4.6 fwdi 55.4 C 4.5 igbt 75.5 4.6 fwdi 75.5 C 4.5 igbt 19.0 C 7.3 fwdi 23.0 6.6 arm axis x y * if you use this value, r th(f-a) should be measured just under the chips. (note-2) tc (under the chip) measurement point is below. (unit : mm) top view tc np buvw bottom view
mitsubishi PM75RLB060 flat-base type insulated package apr. 2004 3.5 mounting part screw : m5 symbol parameter mounting torque weight condition unit n ? m g limits min. typ. max. 2.5 3.0 340 mechanical ratings and characteristics v ce(sat) i ces v fm v ma min. typ. max. v collector-emitter saturation voltage fwdi forward voltage collector-emitter cutoff current i f = 50a (fig. 2) t j = 25 c t j = 125 c unit parameter symbol condition limits 2.1 2.0 3.3 1 10 1.6 1.5 2.2 t j = 25 c t j = 125 c brake part v d = 15v, i c = 50a v cin = 0v, pulsed (fig. 1) v ce = v ces , v cin = 15v (fig. 5) v d = 15v, v cin = 15v applied between : u p -v upc , v p -v vpc , w p -v wpc u n ? v n ? w n ? b r -v nc i d c v ma ms 30 10 1.8 2.3 12.5 0.01 15 ma circuit current input on threshold voltage input off threshold voltage short circuit trip level short circuit current delay time over temperature protection supply circuit under-voltage protection fault output current minimum fault output pulse width v th(on) v th(off) sc t off(sc) ot ot r uv uv r i fo(h) i fo(l) t fo trip level reset level trip level reset level control part 1.2 1.7 150 100 135 11.5 1.0 parameter symbol condition max. min. typ. unit limits 20 5 1.5 2.0 0.2 145 125 12.0 12.5 10 1.8 (note-3) fault output is given only when the internal sc, ot & uv protections schemes of either upper or lower arm device operat e to protect it. v d = 15v detect tj of igbt chip C 20 t j 125 c v d = 15v, v fo = 15v (note-3) v d = 15v (note-3) v s v n1 -v nc v xp1 -v xpc inverter part brake part a recommended conditions for use recommended value unit condition symbol parameter v applied across p-n terminals applied between : v up1 -v upc , v vp1 -v vpc v wp1 -v wpc , v n1 -v nc (note-4) applied between : u p -v upc , v p -v vpc , w p -v wpc u n ? v n ? w n ? b r -v nc using application circuit of fig. 8 for ipm s each input signals (fig. 7) supply voltage control supply voltage input on voltage input off voltage pwm input frequency arm shoot-through blocking time 400 15 1.5 0.8 9.0 20 2.0 v cc v cin(on) v cin(off) f pwm t dead v d v khz s v (note-4) with ripple satisfying the following conditions dv/dt swing 5v/ s, variation 2v peak to peak C 20 t j 125 c, v d = 15v (fig. 3,6) v d = 15v (fig. 3,6)
mitsubishi PM75RLB060 flat-base type insulated package apr. 2004 precautions for testing 1. before appling any control supply voltage (v d ), the input terminals should be pulled up by resistores, etc. to their corre- sponding supply voltage and each input signal should be kept off state. after this, the specified on and off level setting for each input signal should be done. 2. when performing sc tests, the turn-off surge voltage spike at the corresponding protection operation should not be al- lowed to rise above v ces rating of the device. (these test should not be done by using a curve tracer or its equivalent.) p, (u,v,w,b) u,v,w, (n) u,v,w,b, (n) v d (all) in fo in fo v d (all) v cin (0v) ic v v p, (u,v,w) v cin (15v) C ic fig. 7 dead time measurement point example fig. 1 v ce(sat) test fig. 2 v ec , (v fm ) test 0v 1.5v 1.5v 1.5v 2v 2v 2v 0v t t t dead t dead t dead 1.5v: input on threshold voltage vth(on) typical value, 2v: input off threshold voltage vth(off) typical value ipm input signal v cin (upper arm) ipm input signal v cin (lower arm) 10% 90% trr irr tr td(on) tc(on) tc(off) td(off) v cin ic v ce 10% 10% 10% 90% tf (ton= td(on) + tr) (toff= td(off) + tf) fo fo p n n c s c s u,v,w vcc vcc ic ic v d (all) v d (all) p u,v,w v cin v cin v cin ( 15v ) v cin ( 15v ) fo fo fig. 3 switching time and sc test circuit fig. 4 switching time test waveform a) lower arm switching signal input (upper arm) signal input (lower arm) signal input (upper arm) signal input (lower arm) b) upper arm switching v cin fig. 5 i ces test fig. 6 sc test waveform sc short circuit current toff(sc) v d (all) u,v,w, (n) p, (u,v,w,b) a pulse v ce v cin (15v) ic fo in fo constant current
mitsubishi PM75RLB060 flat-base type insulated package apr. 2004 notes for stable and safe operation ; ? design the pcb pattern to minimize wiring length between opto-coupler and ipms input terminal, and also to minimize the stray capacity between the input and output wirings of opto-coupler. ? connect low impedance capacitor between the vcc and gnd terminal of each fast switching opto-coupler. ? fast switching opto-couplers: t plh , t phl 0.8 s, use high cmr type. ? slow switching opto-coupler: ctr > 100% ? use 4 isolated control power supplies (v d ). also, care should be taken to minimize the instantaneous voltage charge of the power supply. ? make inductance of dc bus line as small as possible, and minimize surge voltage using snubber capacitor between p and n terminal. ? use line noise filter capacitor (ex. 4.7nf) between each input ac line and ground to reject common-mode noise from ac line and improve noise immunity of the system. out si ot ot ot ot ot ot ot gnd gnd in vcc u v w b n p m if + C : interface which is the same as the u-phase out si gnd gnd in vcc out si gnd gnd in vcc out si gnd gnd in fo fo fo fo vcc out si gnd gnd in fo vcc out si gnd gnd in fo vcc vwp1 wp vwpc un vn vn1 wn vnc rfo rfo rfo rfo fo vvp1 vp vvpc 0.1 4.7k ? 1k ? 0.1 0.1 20k ? 20k ? 20k ? 10 10 10 20k ? 10 0.1 fo fo fo vup1 up vupc br if if if 5v if out si gnd gnd in fo vcc v d v d v d v d fig. 8 application example circuit
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