september 2011 ?2011 fairchild semiconductor corporation FDMS86500L rev . c1 www.fairchildsemi.com 1 FDMS86500L n-channel powertrench ? mosfet FDMS86500L n-channel powertrench ? mosfet 60 v, 80 a, 2.5 m features ? max r ds(on) = 2.5 m at v gs = 10 v, i d = 25 a ? max r ds(on) = 3.7 m at v gs = 4.5 v, i d = 20 a ? advanced package and silicon combination for low r ds(on) and high efficiency ? next generation enhanced body diode technology, engineered for soft recovery ? msl1 robust package design ? 100% uil tested ? rohs compliant general description this n-channel mosfet ha s been designed specifically to improve the overall efficiency and to minimize switch node ringing of dc/dc converters using either synchronous or conventional switching pwm cont rollers.it has been optimized for low gate charge, low r ds(on) , fast switching speed and body diode reverse recovery performance. applications ? primary switch in isolated dc-dc ? synchronous rectifier ? load switch power 56 d d d d g s s s pin 1 bottom top g s s s d d d d 5 6 7 8 3 2 1 4 mosfet maximum ratings t a = 25 c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage 60 v v gs gate to source voltage 20 v i d drain current -continuous (package limited) t c = 25 c (note 4) 80 a -continuous (silicon limited) t c = 25 c 158 -continuous t a = 25 c (note 1a) 25 -pulsed 180 e as single pulse avalanche energy (note 3) 240 mj p d power dissipation t c = 25 c 104 w power dissipation t a = 25 c (note 1a) 2.5 t j , t stg operating and storage junction temperature range -55 to +150 c r jc thermal resistance, junction to case 1.2 c/w r ja thermal resistance, junction to ambient (note 1a) 50 device marking device package reel size tape width quantity FDMS86500L FDMS86500L power 56 13 ?? 12 mm 3000 units
FDMS86500L n-channel powertrench ? mosfet www.fairchildsemi.com 2 ?2011 fairchild semiconductor corporation FDMS86500L rev . c1 electrical characteristics t j = 25 c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diode characteristics symbol parameter test conditions min typ max units bv dss drain to source breakdown voltage i d = 250 a, v gs = 0 v 60 v bv dss t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c 30 mv/c i dss zero gate voltage drain current v ds = 48 v, v gs = 0 v 1 a i gss gate to source leakage current v gs = 20 v, v ds = 0 v 100 na v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 a11.83v v gs(th) t j gate to source threshold voltage temperature coefficient i d = 250 a, referenced to 25 c -7 mv/c r ds(on) static drain to source on resistance v gs = 10 v, i d = 25 a 2.1 2.5 m v gs = 4.5 v, i d = 20 a 2.9 3.7 v gs = 10 v, i d = 25 a, t j = 125 c 3.1 3.7 g fs forward transconductance v ds = 5 v, i d = 20 a 95 s c iss input capacitance v ds = 30 v, v gs = 0 v, f = 1 mhz 9420 12530 pf c oss output capacitance 1470 1955 pf c rss reverse transfer capacitance 50 80 pf r g gate resistance 1.1 t d(on) turn-on delay time v dd = 30 v, i d = 25 a, v gs = 10 v, r gen = 6 27 43 ns t r rise time 16 28 ns t d(off) turn-off delay time 63 100 ns t f fall time 7.8 16 ns q g total gate charge v gs = 0 v to 10 v v dd = 30 v, i d = 25 a 117 165 nc q g total gate charge v gs = 0 v to 4.5 v 54 108 nc q gs gate to source charge 26.6 nc q gd gate to drain ?miller? charge 11.5 nc v sd source to drain diode forward voltage v gs = 0 v, i s = 2.1 a (note 2) 0.68 1.2 v v gs = 0 v, i s = 25 a (note 2) 0.79 1.3 t rr reverse recovery time i f = 25 a, di/dt = 100 a/ s 54 87 ns q rr reverse recovery charge 42 67 nc t rr reverse recovery time i f = 25 a, di/dt = 300 a/ s 46 73 ns q rr reverse recovery charge 84 134 nc notes : 1. r ja is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r jc is guaranteed by design while r ca is determined by the user's board design. 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. 3. e as of tbd mj is based on starting t j = 25 c, l = 0.3 mh, i as = 40 a, v dd = 54 v, v gs = 10 v. 4. package-limited current of 80 a is based on ideal infinite heatsink condition. a) 50 c/w when mounted on a 1 in 2 pad of 2 oz copper b) 125 c/w when mounted on a minimum pad of 2 oz copper.
FDMS86500L n-channel powertrench ? mosfet www.fairchildsemi.com 3 ?2011 fairchild semiconductor corporation FDMS86500L rev c1 typical characteristics t j = 25 c unless otherwise noted figure 1. 0.0 0.5 1.0 1.5 2.0 2.5 0 30 60 90 120 150 180 v gs = 4 v v gs = 10 v v gs = 3 v v gs = 3.5 v v gs = 4.5 v pulse duration = 80 p s duty cycle = 0.5% max i d , drain current (a) v ds , drain to source voltage (v) on-region characteristics figure 2. 0 30 60 90 120 150 180 0 1 2 3 4 5 v gs = 3 v pulse duration = 80 p s duty cycle = 0.5% max normalized drain to source on-resistance i d , drain current (a) v gs = 4.5 v v gs = 4 v v gs = 3.5 v v gs = 10 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n - r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.6 0.8 1.0 1.2 1.4 1.6 1.8 i d = 25 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 24681 0 0 2 4 6 8 10 t j = 125 o c i d = 25 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m : ) pulse duration = 80 p s duty cycle = 0.5% max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 12345 0 30 60 90 120 150 180 t j = 25 o c t j = 150 o c v ds = 5 v pulse duration = 80 p s duty cycle = 0.5% max t j = -55 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.001 0.01 0.1 1 10 100 1000 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
FDMS86500L n-channel powertrench ? mosfet www.fairchildsemi.com 4 ?2011 fairchild semiconductor corporation FDMS86500L rev c1 figure 7. 0 20 40 60 80 100 120 0 2 4 6 8 10 i d = 25 a v dd = 30 v v dd = 20 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 40 v gate charge characteristics figure 8. 0.1 1 10 60 10 100 1000 10000 50000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.01 0.1 1 10 100 1000 1 10 100 t j = 100 o c t j = 25 o c t j = 125 o c t av , time in avalanche (ms) i as , avalanche current (a) u n c l a m p e d i n d u c t i v e switching capability figure 10. 25 50 75 100 125 150 0 40 80 120 160 limited by package v gs = 4.5 v r t jc = 1.2 o c/w v gs = 10 v i d , drain current (a) t c , case temperature ( o c ) m a x i m u m c o n t i n u o u s d r a i n current vs case temperature figure 11. 0.01 0.1 1 10 100 300 0.01 0.1 1 10 100 200 10 s 10 ms dc 1 s 100 ms 1 ms i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t ja = 125 o c/w t a = 25 o c fo rw ard bi as safe operating area f i g u r e 1 2 . s i n g l e p u l s e m a x i m u m po wer dissipation 10 -3 10 -2 10 -1 110 100 1000 0.5 1 10 100 1000 single pulse r t ja = 125 o c/w t a = 25 o c p ( pk ) , peak transient power (w) t, pulse width (sec) typical characteristics t j = 25 c unless otherwise noted
FDMS86500L n-channel powertrench ? mosfet www.fairchildsemi.com 5 ?2011 fairchild semiconductor corporation FDMS86500L rev c1 figure 13. junction-to-ambient transient thermal response curve 10 -3 10 -2 10 -1 11 0 100 1000 0.001 0.01 0.1 1 2 single pulse r t ja = 125 o c/w duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a typical characteristics t j = 25 c unless otherwise noted
FDMS86500L n-channel powertrench ? mosfet www.fairchildsemi.com 6 ?2011 fairchild semiconductor corporation FDMS86500L rev . c1 dimensional outlin e and pad layout
7 www.fairchildsemi.com FDMS86500L n-channel powertrench ? mosfet ?2011 fairchild semiconductor corporation FDMS86500L rev . c1 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes with out further notice to any products herein to improve reliability, function, or design. fairchild does not assume an y liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s wo rldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fai rchild semiconductor corporation. as used here in: 1. life support devices or systems ar e devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform c an be reasonably expected to cause the failure of the life su pport device or system, or to affect its safety or effectiveness. product status definitions definition of terms 2cool? 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