View ML2340_1908674.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

may 1997 ML2340 * , ml2350 ** single supply, programmable 8-bit d/a converters general description the ML2340 and ml2350 are cmos voltage output, 8-bit d/a converters with an internal voltage reference and a p interface. these devices are designed to be powered by a single supply, although they can be powered from dual power supplies. the output voltage swings above zero scale (v zs ) in the unipolar mode or around zero scale (v zs ) in the bipolar mode, both with programmable gain. v zs can be set to any voltage from agnd to 2.25v below v cc . the digital and analog grounds, dgnd and agnd, are totally independent of each other. dgnd can be set to any voltage from agnd to 4.5v below v cc for easy interfacing to standard ttl and cmos logic families. the high level of integration and versatility of the ML2340 and ml2350 makes them ideal for a wide range of applications in hard disk drives, automotive, telecom, and a variety of general purpose industrial uses. one specific intended application is controlling a hard disk voice coil. the internal reference of the ML2340 provides a 2.25v or 4.50v output for use with a/d converters that use a single 5v 10% power supply, while the ml2350 provide a 2.50v or 5.00v reference output. features programmable output voltage gain settings of 2, 1, 1 / 2 , 1 / 4 provide 8-, 9-, 10-, or 11-bit effective resolution around zero agnd to v cc output voltage swing bipolar or unipolar output voltage 4.5v to 13.2v single supply or 2.25v to 6.5v dual-supply operation transparent latch allows microprocessor interface with 30ns setup time data flow-through mode voltage reference output ML2340 ............................................ 2.25v or 4.50v ml2350 ............................................ 2.50v or 5.00v nonlinearity ................................... 1 / 4 lsb or 1 / 2 lsb output voltage settling time over temperature and supply voltage tolerance within 1v of v cc and agnd .................... 2.5 s max within 100mv of v cc and agnd ................ 5 s max ttl and cmos compatible digital inputs low supply current (5v supply) ..................... 5ma max 18-pin dip or surface mount solc block diagram op amp resistors switches decoders 8-bit d/a data latch v ref v refout v refin dgnd v zs v cc agnd ? + v out db0 (lsb) db7 (msb) xfer gain 0 gain 1 * this part is obsolete ** this part is end of life as of august 1, 2000 rev. 1.0 10/10/2000
ML2340, ml2350 2 rev. 1.0 10/10/2000 pin name function pin name function 1v cc positive supply. 2v out voltage output of the d/a converter. v out is referenced to v zs . 3v zs zero scale voltage. v out is referenced to v zs . v zs is normally tied to agnd in the unipolar mode or to mid-supply in the bipolar mode. when the device is operated from a single power supply, v zs has a maximum current requirement of ?00 a in the bipolar mode. 4 agnd analog ground. 5 dgnd digital ground. this is the ground reference level for all digital inputs. the range is agnd dgnd v cc 4.5v. dgnd is normally tied to system ground. 6 db0 data input ?bit 0 (lsb). 7 db1 data input ?bit 1. pin description 8 db2 data input ?bit 2. 9 db3 data input ?bit 3. 10 db4 data input ?bit 4. 11 db5 data input ?bit 5. 12 db6 data input ?bit 6. 13 db7 data input ?bit 7 (msb). 14 xfer transfer enable input. the data is transferred into the transparent latch at the high level of xfer. 15 gain 0 digital gain setting input 0. 16 gain 1 digital gain setting input 1. 17 v ref out voltage reference output. v ref out is referenced to agnd. v ref out is set to 2.5v and 5.0v in a low-voltage and high-voltage operation, respectively for the ml2350; 2.25v and 4.5v for the ML2340. 18 v ref in voltage reference input. v ref in is referenced to agnd. pin connections v cc v out v zs agnd dgnd db0 db1 db2 db3 v ref in v ref out gain 1 gain 0 xfer db7 db6 db5 db4 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 top view top view v cc v out v zs agnd dgnd db0 db1 db2 db3 v ref in v ref out gain 1 gain 0 xfer db7 db6 db5 db4 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 ML2340 ml2350 18-pin dip (p18) ML2340 ml2350 18-pin soic (s18w)
ML2340, ml2350 rev. 1.0 10/10/2000 3 absolute maximum ratings absolute maximum ratings are those values beyond which the device could be permanently damaged. absolute maximum ratings are stress ratings only and functional device operation is not implied. supply voltage v cc with respect to agnd ........... 14.2v dgnd ............................................. ?.3v to v cc + 0.3v v zs , v ref in ............................................... ?.3v to v cc + 0.3v logic inputs ..................................... ?.3v to v cc + 0.3v input current per pin ............................................ 25ma storage temperature .............................. ?5 c to +150 c package dissipation at t a = 25 c (board mount) ... 875mw lead temperature (soldering 10 sec.) dual-in-line package (molded) .......................... 260 c dual-in-line package (ceramic) ......................... 300 c molded small outline ic package vapor phase (60 sec.) ...................................... 215 c infrared (15 sec.) ............................................. 220 c electrical characteristics unless otherwise specified, t a = operating temperature range, v cc ?agnd = 5v 10% and 12v 10%, v ref in for ML2340 = 2.25v and 4.50v, for ml2350 v ref in = 2.50v and 5.00v, v out load is r l = 1k ? and c l = 100pf, v ref load is r l = 1k ? and c l = 100pf and input control signals with t r = t f 20ns. (note 1) ML2340xcx, ml2350xcx ml2350xix parameter notes conditions min typ max min typ max units converter and programmable gain amplifier converter resolution 8 8 bits integral linearity error gain = 2, 1, 1 / 2 , or 1 / 4 ML2340bxx, ml2350bxx 1 / 4 1 / 4 lsb ML2340cxx, ml2350cxx 1 / 2 1 / 2 lsb differential linearity error gain = 2, 1, 1 / 2 , or 1 / 4 ML2340bxx, ml2350bxx 1 / 4 1 / 4 lsb ML2340cxx, ml2350cxx 1 / 2 1 / 2 lsb mode select v zs with respect to agnd unipolar output 0 1.0 0 1.0 v bipolar output 1.50 v cc ?.25 1.50 v cc ?.25 v offset error figure 1 unipolar mode gain = 1 / 4 , 1 / 2 , 1 10 12 mv gain = 2 20 24 mv bipolar mode figure 1 gain = 1 / 4 , 1 / 2 , 1, 2 10 plus 10 plus mv 2 1 / 2 lsb 2 1 / 2 lsb gain error figure 1 unipolar mode gain = 1 / 4 , 1 / 2 , 1, 2 0.5 2 0.5 2.5 %fs bipolar mode gain = 1 / 4 , 1 / 2 , 1, 2 0.5 2 0.5 2.5 %fs operating conditions supply voltage, v cc ........................... 4.5v dc to 13.2v dc temperature range ml2350bij .......................................... ?0 c to +85 c ML2340bcp, ML2340ccp ml2350bcp, ml2350ccp ML2340bcs, ML2340ccs ml2350bcs, ml2350ccs ...................... 0 c to +70 c
ML2340, ml2350 4 rev. 1.0 10/10/2000 electrical characteristics (continued) ML2340xcx, ml2350xcx ml2350xix parameter notes conditions min typ max min typ max units reference v ref out voltage ML2340bxx v cc 7.0v t a = 25 c 2.23 2.25 2.27 2.23 2.25 2.27 v t min to t max 2.22 2.28 2.18 2.32 v v cc 8.0v t a = 25 c 4.48 4.50 4.52 4.48 4.50 4.52 v t min to t max 4.46 4.54 4.43 4.57 v ML2340cxx v cc 7.0v t a = 25 c 2.22 2.25 2.29 2.22 2.25 2.28 v t min to t max 2.20 2.30 2.18 2.32 v v cc 8.0v t a = 25 c 4.45 4.50 4.55 4.45 4.50 4.55 v t min to t max 4.40 4.60 4.35 4.65 v ml2350bxx v cc 7.0v t a = 25 c 2.48 2.50 2.52 2.48 2.50 2.52 v t min to t max 2.47 2.53 2.43 2.57 v v cc 8.0v t a = 25 c 4.98 5.00 5.02 4.98 5.00 5.02 v t min to t max 4.96 5.04 4.90 5.10 v ml2350cxx v cc 7.0v t a = 25 c 2.45 2.50 2.55 2.46 2.50 2.55 v t min to t max 2.44 2.58 2.42 2.59 v v cc 8.0v t a = 25 c 4.95 5.00 5.05 4.95 5.00 5.05 v t min to t max 4.90 5.10 4.85 5.15 v temperature coefficient v ref out 50 50 ppm/ c v ref output current 0.75 5 0.75 5 ma v ref out power supply 100mv p? , 1khz ?0 ?0 ?0 ?0 db rejection ratio sinewave on v cc v ref in and v zs v ref in input range v cc 8.75v agnd+2 v cc ?.75 agnd+2 v cc ?.75 v v cc 8.75v agnd+2 agnd+7 agnd+2 agnd+7 v v ref in dc input 10 10 m ? resistance v zs voltage range 2 v cc 7.0v agnd v cc ?.25 agnd v cc ?.25 v analog output v out output swing unipolar mode 2 r l = 100k ? agnd+ v cc ?.5 agnd+ v cc ?.5 v 0.01 0.01 r l = 1k ? agnd+ v cc ?.0 agnd+ v cc ?.0 v 1.0 1.0 bipolar mode r l = 100k ? agnd+ v cc ?.1 agnd+ v cc ?.1 v 0.1 0.1 r l = 1k ? agnd + v cc ?.0 agnd + v cc ?.0 v 1.0 1.0 v out output current agnd+1v ML2340, ml2350 rev. 1.0 10/10/2000 5 electrical characteristics (continued) ML2340xcx, ml2350xcx ml2350xix parameter notes conditions min typ max min typ max units digital and dc v in(0) logical ? 0.8 0.8 v input voltage v in(1) logical ? 2.0 2.0 v input voltage i in(0) logical ? v in = dgnd ? ? a input current i in(1) logical ? v in = v cc 11 a input current supply current, bipolar mode i cc , v cc current v cc = 5v 10% 5.3 5.3 ma i agnd , analog ground current ?.0 ?.0 ma i vzs , v zs current ?0 ?00 ?0 ?00 a i cc , v cc current v cc = 12v 10% 9.3 9.3 ma i agnd , analog ground current ?.0 ?.0 ma i vzs , v zs current ?0 ?00 ?0 ?00 a supply current, unipolar mode i cc , v cc current 3 v cc = 5v 10% 6.0 6.0 ma i agnd , analog ground current ?.3 ?.3 ma i vzs , v zs current ?.7 ?.7 ma i cc , v cc current v cc = 12v 10% 11.0 11.0 ma i agnd , analog ground current 3 ?.3 ?.3 ma i vzs , v zs current ?.7 ?.7 ma ac performance settling time figure 2, t s1 output step of agnd + 1v 1.2 2.5 1.2 3.0 s to v cc ?1v, r l = 1k ? t s2 output step of 2.5 5 2.5 6 s agnd + 100mv to v cc ?100mv, r l = 100k ? t s3 output step of 1lsb 1 1 s t s4 , gain change change of any gain setting 1.1 2.5 1.1 s t xfer , xfer pulse width figure 3 60 60 ns t dbs , db0?b7 figure 3 40 45 ns setup time t dbh , db0?b7 figure 3 0 0 ns hold time t reset , power-on 16 16 s reset time note 1: limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions. note 2: supply current and analog ground current are specified with the digital inputs stable and no load on v out . note 3: in unipolar operation with v zs and agnd tied together, digital codes that represent an analog value of less than 100mv from agnd should be avoided.
ML2340, ml2350 6 rev. 1.0 10/10/2000 analog output digital input offset (zero) error ideal ideal with offset gain error actual offset error analog output digital input ideal gain error ideal with offset actual unipolar mode unipolar mode figure 1. gain and offset error valid data t dbs t dbh t wr xfer db0 ? db7 figure 3. single buffered mode t s4 t s1 , t s2 , t s3 settled to 1/2 lsb v out xfer gain 0, gain 1 figure 2. settling time
ML2340, ml2350 rev. 1.0 10/10/2000 7 1.0 functional description 1.1 d/a converter the d/a converter is implemented using an array of equal current sources that are decoded semi-linearly for the four most significant bits to improve differential linearity and to reduce output glitch around major carries. see figure 4. the input voltage reference of the d/a converter is the difference between v ref in and agnd. this difference voltage is converted to a reference current using an internal resistor to set up the appropriate current level in figure 4. d/a converter implementation 4i 4i 4i 2i i i 4-bit divider dac out dac out v cc 1.2 single-supply vs. dual-supply operation ML2340 and ml2350 can be powered from a single supply ranging from 4.5v to 13.2v or dual supplies ranging from 2.25v to 6.6v. the internal digital and analog circuitry is powered between v cc and agnd. the range of dgnd is agnd dgnd v cc ?4.5v with the logic thresholds set between 0.8v and 2.0v above dgnd (standard ttl logic level). the range of v zs is agnd v zs (v cc 2.25v). 1.3 unipolar and bipolar output voltage swing ML2340 and ml2350 can operate in either unipolar or bipolar output voltage mode. unipolar/bipolar mode selection is determined by comparing the zero scale voltage (v zs ) of these devices to a precise internal reference that is referred to agnd. v zs is ideally the voltage that will be produced at the dac voltage output when the digital input data is set to all ?s?unipolar mode is selected when v zs is lower than 1.00 volt, and bipolar mode is selected when v zs is greater than 1.50 volts. 1.3.1 unipolar output mode in the unipolar mode, v out swings above v zs . ideally the 00000000 code results in an output voltage of v zs , and the 11111111 code results in an output voltage of v fs x 255/256, where v fs is the full-scale voltage determined by v ref in and the gain setting. 1.3.2 bipolar output mode in the bipolar mode, v out swings around v zs . the input data is in 2s complement binary format. ideally, the 00000000 code results in an output voltage of v zs ; the 10000000 code results in an output voltage of (v zs ?v fs ); and the 01111111 results in an output voltage of (v zs + v fs 127/128), where v fs is the full scale output voltage determined by v ref in and the gain setting. 1.4 output buffer and gain setting the output buffer converts the d/a output current to a voltage output using a resistive network with proper gain setting determined by the gain 0 and gain 1 inputs. there are four possible gain settings for unipolar output voltage mode and bipolar output voltage mode as listed below: unipolar output voltage mode voltage output swing gain 1 gain 0 gain relative to v zs 00 1 / 4 v ref in 1 / 4 01 1 / 2 v ref in 1 / 2 101 v ref in 1 112 v ref in 2 the d/a converter. the d/a converter output current is then converted to a voltage output by an output buffer and a resistive network. the matching among the on-chip resistors preserves the gain accuracy between these conversions. the d/a converter can be used in a multiplying mode by modulating the reference input within the specified v ref in range.
ML2340, ml2350 8 rev. 1.0 10/10/2000 bipolar output voltage mode gain 1 gain 0 gain voltage output p-p 00 1 / 4 v ref in 1 / 8 01 1 / 2 v ref in 1 / 4 101 v ref in 1 / 2 112 v ref in 1 the output buffer can source or sink as much as 10ma of current with an output voltage of at least 1v from either v cc or agnd. as the output voltage approaches v cc or agnd the current sourcing/sinking capability of the output buffer is reduced. the output buffer can still swing down to within 10mv of agnd and up to within 40mv of v cc with a 100k ? load at v out to agnd in the unipolar operation. in the bipolar operation, the output buffer swing is limited to about 100mv from either rails. 1.5 voltage reference a bandgap voltage reference is incorporated on the ML2340 and ml2350. two reference voltages can be produced by each device. an internal comparator monitors the power supply voltage to determine the selection of the reference voltage. a reference voltage of 2.25 volts on the ML2340 and 2.50 volts on the ml2350 is selected when the supply voltage is less than approximately 7.50 volts. otherwise, a reference voltage of 4.50 volts and 5.00 volts is selected. to prevent the comparator from oscillating between the two selections, avoid operation with a power supply between 70 and 8.0 volts. the bandgap reference is trimmed for zero temperature coefficient (tc) at 35 c to minimize output voltage drift over the specified operating temperature range. the internal reference is buffered for use by the dac and external circuits. the reference buffer will source more than 5ma of current and sink more than 1ma of current. with v ref in connected to v ref out , the following output voltage ranges of the dac are obtained: ML2340 v ref = 2.25v with v ref = 4.5v with gain v cc 7.0v v cc 8.0v setting unipolar bipolar unipolar bipolar 1 / 4 0 to 0.562v ?.281v to 0 to 1.125v ?.562v to +0.281v +0.562v 1 / 2 0 to 1.125v ?.562v to 0 to 2.250v ?.125v to +0.562v +1.125v 1 0 to 2.250v ?.125v to 0 to 4.500v ?.250v to +1.125v +2.250v 2 0 to 4.500v ?.250v to 0 to 9.000v ?.500v to +2.250v +4.500v ml2350 v ref = 2.50v with v ref = 5.0v with gain v cc 7.0v v cc 8.0v setting unipolar bipolar unipolar bipolar 1 / 4 0 to 0.625v ?.3125v to 0 to 1.25v ?.625v to +0.3125v +0.625v 1 / 2 0 to 1.250v ?.6250v to 0 to 2.50v ?.250v to +0.6250v +1.250v 1 0 to 2.500v ?.2500v to 0 to 5.00v ?.500v to +1.2500v +2.500v 2 0 to 5.000v ?.5000v to 0 to 10.00v ?.000v to +2.5000v +5.000v an external reference can alternatively be used on v ref in to set the desired full scale voltage. the linearity of the d/a converter depends on the reference used, however. to insure integral linearity at an 8-bit level, a reference voltage of no less than 2v and no more than 7v (2.75v for operation with a low-voltage power supply) should be used. 1.6 digital interface the digital interface of the ML2340 and ml2350 consist of a transfer input (xfer) and eight data inputs, db0 through db7. the digital interface operates in one of the two modes: 1.6.1 single-buffered mode digital input data on db0?b7 is passed through an 8-bit transparent input latch on the rising edge of xfer. because the outputs of the latch are connected directly to the inputs of the internal dac, changes on the digital data while the xfer input is still active will cause an immediate change in the dac output voltage. to hold the input data on the latch, the xfer input needs deactivated while the data is still stable. 1.6.2 flow-through mode in the flow-through mode, the input latch is bypassed. when xfer is set to logic ?? a change of data inputs, db0?b7, results in an immediate update of the output voltage. 1.7 power-on-reset the ML2340 and ml2350 have an internal power-on- reset circuit to initialize the device when power is first applied to the device. the power-on-reset interval of typically 8 s begins when the supply voltage, v cc reaches approximately 2.0v. during the power-on-reset interval, the transparent latch is reset to all ?s?
ML2340, ml2350 rev. 1.0 10/10/2000 9 2.0 typical applications +v ref v refout v refin ML2340 d/a with reference v out p 4.5v 0 v in 4.5v ml2271 figure 5. using 4.50v reference of d/a for reference of a/d using single 5v v cc 10% data v in v out address decode d7 d0 int den hen tms320 /e14 c15 pa0 pa1 pa2 clock source or timer cs wr rd int db0 db7 ml2261 ML2340 d/a db0 db7 xfer figure 6. tms320 interface +5v v cc v out v refin v refout v zs agnd gain 0 gain 1 2.50v unipolar v out 0 to 5v 256 codes 5.0v ? 100mv 2.5v 256 codes 256 codes 1.25v 256 codes 0.625v gnd gnd gnd gnd v out , gain 2 v out , gain 1 v out , gain 1/2 v out , gain 1/4 ml2350 figure 7. single 5v supply unipolar v out
ML2340, ml2350 10 rev. 1.0 10/10/2000 +12v v cc v out v refin v refout v zs agnd gain 0 gain 1 4.50v bipolar v out around 4.5v 256 codes 9.0v 6.75v 256 codes 256 codes 5.625v 256 codes 5.062v 3.938v 3.375v 2.25v gnd + 100mv v out , gain 2 v out , gain 1 v out , gain 1/2 v out , gain 1/4 ML2340 4.5v 4.5v 4.5v 4.5v typical applications (continued) figure 8. single 12v supply, bipolar v out with 11-bits resolution around 4.5v figure 9. hard disc drive servo coil driver providing 13-bit effective resolution micro- controller 17 18 19 5 1 20 6 3 15 3 5 6 14 4 1 20 16 2 2 ML2340 v cc v ref out v ref in v zs v out agnd dgnd gain 1 gain 0 db7 db0 xfer 0.1 f 0.1 f +12v +12v ref control+ control ? disable gnd powerfail retract high/low i(ret) set v(ret) pwr gnd b output ? r sense pwr gnd a output+ pwr vc +5v ml4406 +5v +12v 19 11 10 13 8 12 1 ? servo coil 9 from motor windings 7 4 r(ret)
ML2340, ml2350 rev. 1.0 10/10/2000 11 physical dimensions inches (millimeters) seating plane 0.240 - 0.260 (6.09 - 6.61) pin 1 id 0.295 - 0.325 (7.49 - 8.26) 0.890 - 0.910 (22.60 - 23.12) 0.016 - 0.022 (0.40 - 0.56) 0.100 bsc (2.54 bsc) 0.008 - 0.012 (0.20 - 0.31) 0.015 min (0.38 min) 18 0 o - 15 o 1 0.050 - 0.065 (1.27 - 1.65) 0.170 max (4.32 max) 0.125 min (3.18 min) 0.045 min (1.14 min) (4 places) package: p18 18-pin pdip seating plane 0.291 - 0.301 (7.39 - 7.65) pin 1 id 0.398 - 0.412 (10.11 - 10.47) 0.449 - 0.463 (11.40 - 11.76) 0.012 - 0.020 (0.30 - 0.51) 0.050 bsc (1.27 bsc) 0.022 - 0.042 (0.56 - 1.07) 0.095 - 0.107 (2.41 - 2.72) 0.005 - 0.013 (0.13 - 0.33) 0.090 - 0.094 (2.28 - 2.39) 18 0.009 - 0.013 (0.22 - 0.33) 0 o - 8 o 1 0.024 - 0.034 (0.61 - 0.86) (4 places) package: s18 18-pin soic
ML2340, ml2350 12 rev. 1.0 10/10/2000 ordering information integral & differential temperature part number non-linearity range package v ref out = 2.25v with v cc = 5v ML2340ccp/5 (obs) 1/2 lsb 0 c to 70 c molded dip (p18) ML2340ccs/5 (obs) 0 c to 70 c molded soic (s18) v ref out = 2.50v with v cc = 5v ml2350ccp/5 (obs) 1/2 lsb 0 c to 70 c molded dip (p18) ml2350ccs/5 (eol) 0 c to 70 c molded soic (s18) ml2350cis/5 (eol) ?0 c to 85 c molded soic (s18) v ref out = 4.50v with v cc = 12v ML2340ccp/12 (obs) 1/2 lsb 0 c to 70 c molded dip (p18) ML2340ccs/12 (obs) 0 c to 70 c molded soic (s18) v ref out = 5.00v with v cc = 12v ml2350ccp/12 (obs) 1/2 lsb 0 c to 70 c molded dip (p18) ml2350ccs/12 (obs) 0 c to 70 c molded soic (s18) ml2350cis/12 (obs) ?0 c to 85 c molded soic (s18) life support policy fairchild? products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com ?2000 fairchild semiconductor corporation disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others.

▲Up To Search▲

Price & Availability of ML2340

	To Download ML2340 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .