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NTMFS4899NF Power MOSFET
Features
30 V, 75 A, Single N-Channel, SO-8 FL
* * * * *
Integrated Schottky Diode Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant
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V(BR)DSS 30 V
RDS(ON) MAX 5.0 mW @ 10 V 7.5 mW @ 4.5 V
ID MAX 75 A
Applications
* CPU Power Delivery * DC-DC Converters * Low Side Switching
N-CHANNEL MOSFET D Unit V V A G S 30 20 17.8 12.9 PD ID PD ID PD ID PD IDM IDmaxpkg TJ, TSTG IS dV/dt EAS 2.70 29.1 21 7.18 10.4 7.5 0.92 75 54 48 188 90 -55 to +150 46 6 84 W A A C A V/ns mJ NTMFS4899NFT3G W A W
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MAXIMUM RATINGS (TJ = 25C unless otherwise stated)
Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current RqJA (Note 1) Power Dissipation RqJA (Note 1) Continuous Drain Current RqJA v 10 sec Power Dissipation RqJA, t v 10 sec Continuous Drain Current RqJA (Note 2) Power Dissipation RqJA (Note 2) Continuous Drain Current RqJC (Note 1) Power Dissipation RqJC (Note 1) Pulsed Drain Current tp=10ms Steady State TA = 25C TA = 85C TA = 25C TA = 25C TA = 85C TA = 25C TA = 25C TA = 85C TA = 25C TC = 25C TC = 85C TC = 25C TA = 25C TA = 25C Symbol VDSS VGS ID Value
W A
MARKING DIAGRAM
D S S S G 4899NF AYWWG G D D
A
SO-8 FLAT LEAD CASE 488AA STYLE 1
D
A = Assembly Location Y = Year WW = Work Week G = Pb-Free Package (Note: Microdot may be in either location)
ORDERING INFORMATION
Device NTMFS4899NFT1G Package SO-8FL (Pb-Free) SO-8FL (Pb-Free) Shipping 1500 / Tape & Reel 5000 / Tape & Reel
Current limited by package Operating Junction and Storage Temperature Source Current (Body Diode) Drain to Source dV/dt
Single Pulse Drain-to-Source Avalanche Energy (VDD = 50 V, VGS = 10 V, IL = 41 Apk, L = 0.1 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8" from case for 10 s)
TL
260
C
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Publication Order Number: NTMFS4899NF/D
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
(c) Semiconductor Components Industries, LLC, 2010
March, 2010 - Rev. 0
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NTMFS4899NF
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THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Junction-to-Case (Drain) Junction-to-Ambient - Steady State (Note 1) Junction-to-Ambient - Steady State (Note 2) Junction-to-Ambient - t v 10 sec Symbol RqJC RqJA RqJA RqJA Value 2.6 46.3 136.2 17.4 C/W Unit
1. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 2. Surface-mounted on FR4 board using the minimum recommended pad size (50 mm2, 1 oz Cu).
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)
Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain-to-Source On Resistance VGS(TH) VGS(TH)/TJ RDS(on) VGS = 10 V VGS = 4.5 V Forward Transconductance CHARGES AND CAPACITANCES Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge SWITCHING CHARACTERISTICS (Note 4) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time td(ON) tr td(OFF) tf VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W 12.6 20.3 20 4.2 ns CISS COSS CRSS QG(TOT) QG(TH) QGS QGD QG(TOT) VGS = 10 V, VDS = 15 V, ID = 30 A VGS = 4.5 V, VDS = 15 V; ID = 30 A VGS = 0 V, f = 1 MHz, VDS = 12 V 1600 360 165 12.2 1.6 4.6 4.6 25 nC nC pF gFS ID = 30 A ID = 15 A ID = 30 A ID = 15 A VDS = 1.5 V, ID = 15 A VGS = VDS, ID = 1.0 mA 1.5 10 3.9 3.8 6.0 5.8 57 S 7.5 5.0 mW 2.5 V mV/C V(BR)DSS V(BR)DSS/ TJ IDSS IGSS VGS = 0 V, VDS = 24 V TJ = 25 C VGS = 0 V, ID = 1.0 mA 30 27 500 100 V mV/C mA nA Symbol Test Condition Min Typ Max Unit
VDS = 0 V, VGS = 20 V
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures.
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ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)
Parameter SWITCHING CHARACTERISTICS (Note 4) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD tRR ta tb QRR LS LD LG RG TA = 25C VGS = 0 V, dIS/dt = 100 A/ms, IS = 30 A VGS = 0 V, IS = 2.0 A TJ = 25C TJ = 125C 0.45 0.43 19 9.2 9.8 5.7 nC ns 0.70 V td(ON) tr td(OFF) tf VGS = 10 V, VDS = 15 V, ID = 15 A, RG = 3.0 W 8.8 18.5 25.9 2.5 ns Symbol Test Condition Min Typ Max Unit
Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge PACKAGE PARASITIC VALUES Source Inductance Drain Inductance Gate Inductance Gate Resistance
0.38 0.005 1.84 1.5 2.4
nH
W
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures.
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TYPICAL CHARACTERISTICS
180 160 ID, DRAIN CURRENT (A) 140 120 100 80 60 40 20 0 0 0.5 1 1.5 2 2.5 3 3.5 6V 7 V to 10 V VGS = 4.6 V 4.8 V 5V TJ = 25C 4.4 V 4.2 V 4V 3.8 V 3.6 V 3.4 V 3.2 V 3V 2.8 V 2.6 V 4 4.5 5 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 180 160 VDS = 10 V ID, DRAIN CURRENT (A) 140 120 100 80 60 40 20 0 1 TJ = 25C TJ = -55C 1.5 2 2.5 3 3.5 4 4.5 5 VGS, GATE-TO-SOURCE VOLTAGE (V) TJ = 125C
Figure 1. On-Region Characteristics
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W)
Figure 2. Transfer Characteristics
1.1E-02 1E-02 9E-03 8E-03 7E-03 6E-03 5E-03 4E-03 3E-03 3.0 4.0 5.0 6.0 7.0 8.0 9.0 ID = 30 A TJ = 25C
9E-03 8E-03 7E-03 6E-03 5E-03 4E-03 3E-03 2E-03 10 20 30 40 50 60 70 80 90 100 VGS = 10 V TJ = 25C
VGS = 4.5 V
10.0
VGS, GATE-TO-SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 3. On-Region versus VGS
1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 -50 1.0E-01 ID = 30 A VGS = 10 V
Figure 4. On-Resistance versus Drain Current and Gate Voltage
RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED)
VGS = 0 V 1.0E-02 IDSS, LEAKAGE (nA) 1.0E-03 1.0E-04 1.0E-05 1.0E-06 TJ = 25C TJ = 150C TJ = 125C
-25
0
25
50
75
100
125
150
5
10
15
20
25
30
TJ, JUNCTION TEMPERATURE (C)
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 5. On-Resistance Variation with Temperature
Figure 6. Drain-to-Source Leakage Current vs. Voltage
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TYPICAL CHARACTERISTICS
2000 1800 C, CAPACITANCE (pF) 1600 1400 1200 1000 800 600 400 200 0 0 Coss Crss 10 15 20 25 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 5 30 Ciss TJ = 25C VGS = 0 V 11 10 9 8 7 6 5 4 3 2 1 0 0 Qgs Qgd ID = 30 A TJ = 25C VDD = 15 V VGS = 10 V 25 QT
VGS, GATE-TO-SOURCE VOLTAGE (V)
5 10 15 20 Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
1000 IS, SOURCE CURRENT (A) VDD = 15 V ID = 15 A VGS = 10 V 100 t, TIME (ns) 30 25 20 15 10 5 0 0.1
Figure 8. Gate-to-Source and Drain-to-Source Voltage vs. Total Charge
VGS = 0 V TJ = 25C
td(off) tf tr
10
td(on)
1
1
Figure 9. Resistive Switching Time Variation vs. Gate Resistance
10 RG, GATE RESISTANCE (W)
100
0.2 0.3 0.4 0.5 0.6 0.7 0.8 VSD, SOURCE-TO-DRAIN VOLTAGE (V)
0.9
Figure 10. Diode Forward Voltage vs. Current
1000 100 10 1 0.1 RDS(on) Limit Thermal Limit Package Limit 0.1 1 10 VDS, DRAIN-TO-SOURCE VOLTAGE (V) VGS = 30 V Single Pulse TC = 25C EAS, SINGLE PULSE DRAIN-TO- SOURCE AVALANCHE ENERGY (mJ)
90 80 70 60 50 40 30 20 10 0 25 50 75 100 125 TJ, STARTING JUNCTION TEMPERATURE(C) 150 1 ID = 41 A
ID, DRAIN CURRENT (A)
10 ms 100 ms 1 ms 10 ms
dc
0.01
100
Figure 11. Maximum Rated Forward Biased Safe Operating Area
Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature
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PACKAGE DIMENSIONS
DFN5 5x6, 1.27P (SO-8FL) CASE 488AA-01 ISSUE D
0.20 C D 2 D1 A B
2X
2X
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q MILLIMETERS MIN NOM MAX 0.90 1.00 1.10 0.00 --- 0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.15 BSC 4.50 4.90 5.10 3.50 --- 4.22 6.15 BSC 5.50 5.80 6.10 3.45 --- 4.30 1.27 BSC 0.51 0.61 0.71 0.51 --- --- 0.51 0.61 0.71 0.05 0.17 0.20 3.00 3.40 3.80 0_ --- 12 _
0.20 C E1 2 E c
4X
q
A1
1
2
3
4
TOP VIEW
3X
C
SEATING PLANE
0.10 C A 0.10 C SIDE VIEW
8X
e
DETAIL A
DETAIL A
SOLDERING FOOTPRINT*
1.270
3X
b e/2
1 4
0.750
4X
STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN
0.10 0.05
CAB c L 0.965 K E2 L1 1.330 M 0.495 3.200 0.475
2X 2X
1.000
4X
0.905 4.530
2X
PIN 5 (EXPOSED PAD)
G
D2 BOTTOM VIEW 4.560
1.530
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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