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NTMFS4897NF Power MOSFET
Features
30 V, 171 A, Single N-Channel, SO-8 FL
* * * * *
Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Includes Schottky Diode Optimized Gate Charge to Minimize Switching Losses These are Pb-Free Device
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Applications
V(BR)DSS 30 V
RDS(ON) MAX 2.0 mW @ 10 V 3.0 mW @ 4.5 V
ID MAX 171 A
* CPU Power Delivery * DC-DC Converters * Low Side Switching
MAXIMUM RATINGS (TJ = 25C unless otherwise stated)
Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current RqJA (Note 1) Power Dissipation RqJA (Note 1) Continuous Drain Current RqJA v 10 sec Power Dissipation RqJA, t v 10 sec Continuous Drain Current RqJA (Note 2) Power Dissipation RqJA (Note 2) Continuous Drain Current RqJC (Note 1) Power Dissipation RqJC (Note 1) Pulsed Drain Current tp=10ms Steady State TA = 25C TA = 85C TA = 25C TA = 25C TA = 85C TA = 25C TA = 25C TA = 85C TA = 25C TC = 25C TC = 85C TC = 25C TA = 25C TA = 25C PD IDM IDmaxpkg TJ, TSTG IS dV/dt EAS PD ID PD ID PD ID Symbol VDSS VGS ID Value 30 20 29 21 2.74 47 34 7.3 17 12 0.95 171 123 96.2 288 100 -55 to +150 120 6 375 W A A C A V/ns mJ W A W A W A Unit V V A
N-CHANNEL MOSFET D
G S
MARKING DIAGRAM
D
1
SO-8 FLAT LEAD CASE 488AA STYLE 1
S S S G
4897NF AYWWG G D
D
D
A = Assembly Location Y = Year WW = Work Week G = Pb-Free Package (Note: Microdot may be in either location)
Current limited by package Operating Junction and Storage Temperature Source Current (Body Diode) Drain to Source dV/dt
ORDERING INFORMATION
Device NTMFS4897NFT1G NTMFS4897NFT3G Package SO-8FL (Pb-Free) SO-8FL (Pb-Free) Shipping 1500 / Tape & Reel 5000 / Tape & Reel
Single Pulse Drain-to-Source Avalanche Energy (VDD = 50 V, VGS = 10 V, IL = 50 Apk, L = 0.3 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8" from case for 10 s)
TL
260
C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2009
December, 2009 - Rev. 0
1
Publication Order Number: NTMFS4897NF/D
NTMFS4897NF
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THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Junction-to-Case (Drain) Junction-to-Ambient - Steady State (Note 1) Junction-to-Ambient - Steady State (Note 2) Junction-to-Ambient - t v 10 sec 1. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 2. Surface-mounted on FR4 board using the minimum recommended pad size. Symbol RqJC RqJA RqJA RqJA Value 1.3 45.7 132.1 17.2 C/W Unit
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)
Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain-to-Source On Resistance VGS(TH) VGS(TH)/TJ RDS(on) VGS = 10 V VGS = 4.5 V Forward Transconductance CHARGES AND CAPACITANCES Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge SWITCHING CHARACTERISTICS (Note 4) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time td(ON) tr td(OFF) tf VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W 26 24 36 13 ns CISS COSS CRSS QG(TOT) QG(TH) QGS QGD QG(TOT) VGS = 10 V, VDS = 15 V, ID = 23 A VGS = 4.5 V, VDS = 15 V; ID = 23 A VGS = 0 V, f = 1 MHz, VDS = 15 V 5660 1150 495 40.2 6.4 15.3 13.4 83.6 nC nC pF gFS ID = 22 A ID = 20 A ID = 20 A ID = 18 A VDS = 15 V, ID = 15 A VGS = VDS, ID = 1.0 mA 1.5 2.0 4 1.3 1.3 2.0 2.0 90 S 3.0 2.0 mW 2.5 V mV/C V(BR)DSS V(BR)DSS/ TJ IDSS IGSS VGS = 0 V, VDS = 24 V TJ = 25 C VGS = 0 V, ID = 1.0 mA 30 28.5 60 500 100 V mV/C mA nA Symbol Test Condition Min Typ Max Unit
VDS = 0 V, VGS = 20 V
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures.
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ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)
Parameter SWITCHING CHARACTERISTICS (Note 4) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD tRR ta tb QRR LS LD LG RG TA = 25C VGS = 0 V, dIS/dt = 100 A/ms, IS = 23 A VGS = 0 V, IS = 2.0 A TJ = 25C TJ = 125C 0.35 0.26 39.1 20.1 19 34 nC ns 0.70 V td(ON) tr td(OFF) tf VGS = 10 V, VDS = 15 V, ID = 15 A, RG = 3.0 W 15.7 21.2 44.6 14.5 ns Symbol Test Condition Min Typ Max Unit
Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge PACKAGE PARASITIC VALUES Source Inductance Drain Inductance Gate Inductance Gate Resistance
0.66 0.20 1.5 0.7 2.0
nH
W
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures.
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TYPICAL PERFORMANCE CURVES
300 280 260 240 220 200 180 160 140 120 100 80 60 40 20 0 4.2 V thru 10 V TJ = 25C VGS = 4.0 V 3.8 V 3.6 V 3.4 V 3.2 V 3.0 V 2.8 V 0 1 2 3 4 5 ID, DRAIN CURRENT (A) 300 280 260 240 220 200 180 160 140 120 100 80 60 40 20 0 VDS = 10 V
ID, DRAIN CURRENT (A)
TJ = 25C TJ = 125C TJ = -55C 1 1.5 2 2.5 3 3.5 4 4.5 5 VGS, GATE-TO-SOURCE VOLTAGE (V)
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 0.010 0.008 0.006 0.004 0.002 0 ID = 20 A TJ = 25C RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 0.0035
Figure 2. Transfer Characteristics
TJ = 25C
0.0030 0.0025 VGS = 4.5 V
0.0020 0.0015 VGS = 10 V
0.0010 0.0005 0 10 30 50 70 90 110 130 150 170 190 210
2
3
4
5
6
7
8
9
10
VGS, GATE-TO-SOURCE VOLTAGE (V) RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED)
ID, DRAIN CURRENT (A)
Figure 3. On-Resistance vs. Gate-to-Source Voltage
1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -50 ID = 20 A VGS = 10 V IDSS, LEAKAGE (nA) 1E+07 1E+10
Figure 4. On-Resistance vs. Drain Current and Gate Voltage
VGS = 0 V TJ = 150C TJ = 125C TJ = 25C 1E+04
1E+01 -25 0 25 50 75 100 125 150 5 10 15 20 25 30 TJ, JUNCTION TEMPERATURE (C) VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 5. On-Resistance Variation with Temperature
Figure 6. Drain-to-Source Leakage Current vs. Voltage
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TYPICAL PERFORMANCE CURVES
VGS, GATE-TO-SOURCE VOLTAGE (V) 8000 7000 C, CAPACITANCE (pF) 6000 5000 4000 3000 2000 1000 0 0 Crss 4 8 12 16 20 24 Coss 28 VGS = 0 V TJ = 25C Ciss 11 10 9 8 7 6 5 4 3 2 1 0 Qgs Qgd ID = 30 A TJ = 25C VDD = 15 V VGS = 30 A 0 10 40 50 20 30 60 70 QG, TOTAL GATE CHARGE (nC) 80 QT
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
1000 30 IS, SOURCE CURRENT (A) 25 20 15 10 5 0
Figure 8. Gate-to-Source and Drain-to-Source Voltage vs. Total Charge
VDD = 15 V ID = 15 A VGS = 10 V
td(off) tf tr td(on)
VGS = 0 V TJ = 25C
t, TIME (ns)
100
10
1
1
10 RG, GATE RESISTANCE (W)
100
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
VSD, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation vs. Gate Resistance
VGS = 30 V Single Pulse TC = 25C EAS, SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ) 1000 I D, DRAIN CURRENT (A) 100 10 1 0.1 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 400 350 300 250 200 150 100 50 0
Figure 10. Diode Forward Voltage vs. Current
ID = 50 A
10 ms 100 ms 1 ms 10 ms
dc
0.01
10 1 VDS, DRAIN-TO-SOURCE VOLTAGE (V)
100
25
50 75 150 100 125 TJ, STARTING JUNCTION TEMPERATURE (C)
Figure 11. Maximum Rated Forward Biased Safe Operating Area
Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature
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NTMFS4897NF
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PACKAGE DIMENSIONS
DFN6 5x6, 1.27P (SO8 FL) CASE 488AA-01 ISSUE C
0.20 C D 2
6
2X
A B
5 2X
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q MILLIMETERS MIN NOM MAX 1.10 0.90 1.00 0.00 --- 0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.15 BSC 4.50 4.90 5.10 3.50 --- 4.22 6.15 BSC 5.50 5.80 6.10 3.45 --- 4.30 1.27 BSC 0.51 0.61 0.71 0.51 --- --- 0.51 0.61 0.71 0.05 0.17 0.20 3.00 3.40 3.80 0_ --- 12 _
D1
0.20 C E1 2 E c
4X
q
A1
1
2
3
4
TOP VIEW
3X
C
SEATING PLANE
0.10 C A 0.10 C SIDE VIEW
8X
e
DETAIL A
DETAIL A
SOLDERING FOOTPRINT*
1.270
STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 3X
b e/2
1 4
0.750
4X
0.10 0.05
CAB c L
1.000
4X
0.965 1.330 0.495 3.200 0.475
2X 2X
K E2 L1
6 5
0.905 4.530
2X
M
G
D2 BOTTOM VIEW
1.530 4.560 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
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NTMFS4897NF/D


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