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NTD3813N Power MOSFET 16 V, 51 A, Single N-Channel, DPAK/IPAK Features * * * * * Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses Three Package Variations for Design Flexibility These are Pb-Free Devices http://onsemi.com V(BR)DSS 16 V RDS(ON) MAX 8.75 mW @ 10 V ID MAX 51 A Applications * DC-DC Converters * High Side Switching MAXIMUM RATINGS (TJ = 25C unless otherwise stated) Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current RqJA (Note 1) Power Dissipation RqJA (Note 1) Continuous Drain Current RqJA (Note 2) Power Dissipation RqJA (Note 2) Continuous Drain Current RqJC (Note 1) Power Dissipation RqJC (Note 1) Pulsed Drain Current tp=10ms Steady State TA = 25C TA = 85C TA = 25C TA = 25C TA = 85C TA = 25C TC = 25C TC = 85C TC = 25C TA = 25C TA = 25C PD IDM IDmaxPkg TJ, TSTG IS dV/dt EAS PD ID PD ID Symbol VDSS VGS ID Value 16 16 13.8 10.7 2.6 9.6 7.4 1.2 51 39 34.9 114 35 -55 to +175 29 6 15 W A A C A V/ns mJ 4 Drain YWW 38 13NG W A CASE 369AA DPAK (Bent Lead) STYLE 2 W 4 A 12 3 Unit V V A G 14.5 mW @ 4.5 V D S N-CHANNEL MOSFET 4 4 1 2 3 CASE 369AC CASE 369D 3 IPAK IPAK (Straight Lead) (Straight Lead DPAK) 23 1 MARKING DIAGRAMS & PIN ASSIGNMENTS 4 Drain YWW 38 13NG 4 Drain YWW 38 13NG Current Limited by Package Operating Junction and Storage Temperature Source Current (Body Diode) Drain to Source dV/dt Single Pulse Drain-to-Source Avalanche Energy (TJ = 25C, VDD = 50 V, VGS = 10 V, IL = 10 Apk, L = 0.3 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8" from case for 10 s) TL 260 C 2 1 23 1 Drain 3 Gate Source Gate Drain Source 1 2 3 Gate Drain Source Y WW 3813N G = Year = Work Week = Device Code = Pb-Free Package Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. (c) Semiconductor Components Industries, LLC, 2007 1 December, 2007 - Rev. 0 Publication Order Number: NTD3813N/D NTD3813N THERMAL RESISTANCE MAXIMUM RATINGS Parameter Junction-to-Case (Drain) Junction-to-TAB (Drain) Junction-to-Ambient - Steady State (Note 1) Junction-to-Ambient - Steady State (Note 2) 1. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 2. Surface-mounted on FR4 board using the minimum recommended pad size. Symbol RqJC RqJC-TAB RqJA RqJA Value 4.3 3.6 58 121 Unit C/W ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified) Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current V(BR)DSS V(BR)DSS/ TJ IDSS VGS = 0 V, VDS = 16 V TJ = 25C TJ = 125C VGS = 0 V, ID = 250 mA 16 16.8 1.0 10 100 V mV/C mA nA Symbol Test Condition Min Typ Max Unit Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain-to-Source On Resistance IGSS VDS = 0 V, VGS = 16 V VGS(TH) VGS(TH)/TJ RDS(on) VGS = VDS, ID = 250 mA 1.5 5.3 2.5 V mV/C VGS = 10 V VGS = 4.5 V ID = 15 A ID = 15 A 7.2 11 40 8.75 14.5 mW S Forward Transconductance CHARGES AND CAPACITANCES Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge SWITCHING CHARACTERISTICS (Note 4) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time gFS VDS = 1.5 V, ID = 15 A CISS COSS CRSS QG(TOT) QG(TH) QGS QGD QG(TOT) VGS = 10 V, VDS = 12 V, ID = 15 A VGS = 4.5 V, VDS = 12 V, ID = 15 A VGS = 0 V, f = 1.0 MHz, VDS = 12 V 963 338 191 8.5 0.93 3.1 3.8 16.7 nC nC 12.8 pF td(ON) tr td(OFF) tf td(ON) tr td(OFF) tf VGS = 10 V, VDS = 12 V, ID = 15 A, RG = 3.0 W VGS = 4.5 V, VDS = 12 V, ID = 15 A, RG = 3.0 W 12 38 14 5.0 8.0 33 20 8.0 ns ns 3. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. 5. Assume standoff of 110 mm. http://onsemi.com 2 NTD3813N ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified) Parameter DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD VGS = 0 V, IS = 15 A TJ = 25C TJ = 125C 0.88 0.76 14.4 VGS = 0 V, dIS/dt = 100 A/ms, IS = 15 A 6.8 7.6 3.7 nC ns 1.2 V Symbol Test Condition Min Typ Max Unit Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge PACKAGE PARASITIC VALUES Source Inductance Drain Inductance, DPAK Drain Inductance, IPAK (Note 5) Gate Inductance Gate Resistance tRR ta tb QRR LS LD LD LG RG TA = 25C 2.49 0.0164 1.88 3.46 0.4 nH W 3. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. 5. Assume standoff of 110 mm. http://onsemi.com 3 NTD3813N TYPICAL PERFORMANCE CURVES 45 10 V ID, DRAIN CURRENT (AMPS) 40 35 30 25 20 15 3.2 V 10 5 0 0 0.5 1 1.5 2 2.5 3.0 V 2.8 V 3 3.4 V 4.5 V 4V TJ = 25C 3.8 V 3.6 V ID, DRAIN CURRENT (AMPS) 45 40 35 30 25 20 15 10 5 0 1 TJ = 25C TJ = -55C 2 3 4 5 TJ = 125C VDS 10 V VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) Figure 1. On-Region Characteristics RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) Figure 2. Transfer Characteristics 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 3 4 5 6 7 8 9 10 ID = 15 A TJ = 25C 0.018 0.016 0.014 0.012 0.010 0.008 0.006 0.004 5 VGS = 10 V TJ = 25C VGS = 4.5 V 10 15 20 25 30 35 40 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) ID, DRAIN CURRENT (AMPS) Figure 3. On-Resistance vs. Gate-to-Source Voltage RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 1.6 ID = 15 A VGS = 10 V IDSS, LEAKAGE (nA) 1000 10000 Figure 4. On-Resistance vs. Drain Current and Gate Voltage VGS = 0 V TJ = 175C 1.4 1.2 1.0 100 TJ = 125C 0.8 10 -25 0 25 50 75 100 125 150 175 5 7 9 11 13 15 TJ, JUNCTION TEMPERATURE (C) VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 0.6 -50 Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-to-Source Leakage Current vs. Drain Voltage http://onsemi.com 4 NTD3813N TYPICAL PERFORMANCE CURVES 1400 1300 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 0 10 QT 8 VGS = 0 V Ciss TJ = 25C VGS , GATE-TO-SOURCE VOLTAGE (VOLTS) C, CAPACITANCE (pF) 6 Q1 Q2 VGS Coss 4 2 ID = 15 A TJ = 25C 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 QG, TOTAL GATE CHARGE (nC) Crss 2 4 6 8 10 12 14 16 DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation Figure 8. Gate-To-Source and Drain-To-Source Voltage vs. Total Charge 15 14 VGS = 0 V 13 T = 25C J 12 11 10 9 8 7 6 5 4 3 2 1 0 0.4 0.5 1000 IS, SOURCE CURRENT (AMPS) VDD = 12 V ID = 15 A VGS = 10 V t, TIME (ns) 100 tr td(off) 10 td(on) tf 1 1 10 RG, GATE RESISTANCE (OHMS) 100 0.6 0.7 0.8 0.9 1.0 VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation vs. Gate Resistance EAS, SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ) 1000 I D, DRAIN CURRENT (AMPS) 15 Figure 10. Diode Forward Voltage vs. Current ID = 10 A 12.5 10 7.5 5.0 2.5 0 25 100 10 ms 100 ms 10 VGS = 20 V SINGLE PULSE TC = 25C RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 0.1 1 10 1 ms 10 ms dc 1 100 50 75 100 125 150 175 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) TJ, JUNCTION TEMPERATURE (C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 5 NTD3813N ORDERING INFORMATION Device NTD3813NT4G NTD3813N-1G NTD3813N-35G Package DPAK (Pb-Free) IPAK (Pb-Free) IPAK Trimmed Lead (3.5 " 0.15 mm) (Pb-Free) Shipping 2500 / Tape & Reel 75 Units / Rail 75 Units / Rail For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 6 NTD3813N PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369AA-01 ISSUE A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.025 0.035 0.018 0.024 0.030 0.045 0.386 0.410 0.018 0.023 0.090 BSC 0.180 0.215 0.024 0.040 0.020 --0.035 0.050 0.155 --MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.63 0.89 0.46 0.61 0.77 1.14 9.80 10.40 0.46 0.58 2.29 BSC 4.57 5.45 0.60 1.01 0.51 --0.89 1.27 3.93 --- -TB V R 4 SEATING PLANE C E A S 1 2 3 Z H U F L D 2 PL J DIM A B C D E F H J L R S U V Z 0.13 (0.005) M T STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN SOLDERING FOOTPRINT* 6.20 0.244 3.0 0.118 2.58 0.101 5.80 0.228 1.6 0.063 6.172 0.243 SCALE 3:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 NTD3813N PACKAGE DIMENSIONS 3 IPAK, STRAIGHT LEAD CASE 369AC-01 ISSUE O NOTES: 1.. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2.. CONTROLLING DIMENSION: INCH. 3. SEATING PLANE IS ON TOP OF DAMBAR POSITION. 4. DIMENSION A DOES NOT INCLUDE DAMBAR POSITION OR MOLD GATE. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.043 0.090 BSC 0.034 0.040 0.018 0.023 0.134 0.142 0.180 0.215 0.035 0.050 0.000 0.010 MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.09 2.29 BSC 0.87 1.01 0.46 0.58 3.40 3.60 4.57 5.46 0.89 1.27 0.000 0.25 B V R C E A SEATING PLANE W F G K J H D 3 PL 0.13 (0.005) W DIM A B C D E F G H J K R V W IPAK (STRAIGHT LEAD DPAK) CASE 369D-01 ISSUE B B V R 4 C E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 --MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 --- Z A 3 S -TSEATING PLANE 1 2 K F D G 3 PL J H 0.13 (0.005) M DIM A B C D E F G H J K R S V Z T STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 8 NTD3813N/D |
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