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Advanced Power Electronics Corp. FEATURES Ultra Low Dropout Voltage 200mV at 5A Output Current Low ESR Output Capacitor (MLCC) Applicable 0.8V Reference Voltage Fast Transient Response Current Limit and Thermal Shutdown Protection Adjustable Output Voltage by External Resistors Power-on-Reset Monitoring on Both VCNTL and VIN Pins Under Voltage Protection Power OK Output with a Delay Time Internal Soft-Start SOP-8 with Exposed Pad Package RoHS Compliant & Halogen Free APE8955 DESCRIPTION The APE8955 is a 5A ultra low dropout linear regulator. The product is specifically designed to provide well supply voltage for front side bus termination on motherboard and NB applications. The IC needs two supply voltages, a voltage for the circuitry and a main supply voltage for power conversion, to reduce power dissipation and provide extremely low dropout. The APE8955 integrates many functions. A Power-on-Reset(POR) circuit monitors both supply voltage to prevent wrong operations. A thermal shutdown and current limit functions protect the device against thermal and current over-load. A POK indicates the output status with time delay which is set internally. It can control other converter for power sequence. The APE8955 can be enabled by other power system. Pulling and holding the EN pin below 0.4V shuts off the output. The APE8955 is available in ESOP-8 package which features small size as SO-8 and exposed pad to reduce the junction-to-case resistance, being applicable in 2~3W applications. 5A ULTRA LOW DROPOUT LINEAR REGULATOR TYPICAL APPLICATION R3 1K VCNTL=5V R3 1K VCNTL=5V R4 5.1-15 6 VCNTL VIN 5 VIN=1.5V 6 VCNTL VIN 5 C2 100uF VIN=1.5V 7 POK VOUT 4 C3 0.1uF 7 POK VOUT 4 C2 22uF C1 1uF APE8955 8 EN VOUT 3 R1 1K C6 12~48nF R2 2K VOUT=1.2V/5A C1 1uF APE8955 8 EN VOUT 3 VOUT=1.2V/5A R1 39K 1 GND FB 2 1 C4 220uF C5 0.1uF GND FB 2 C4 30pF C3 22uF R2 78K VOUT=VFB x (1+R1/R2) VFB=0.8V Figure 1. Output Capacitor with ESR > 20m Figure 2. Output Capacitor is MLCC PACKAGE ORDERING INFORMATION APE8955 Package type MP : ESOP-8 Data and specifications subject to change without notice 1 20080910C Advanced Power Electronics Corp. ABSOLUTE MAXIMUM RATINGS VCNTL Supply Voltage(VCNTL) ........................... -0.3 to 7 V VIN Supply Voltage(VIN) ................................. -0.3 to 3.3 V EN and FB Pin Voltage .................................... -0.3 to VCNTL + 0.3V Power Good Voltage(VPOK) .............................. -0.3 to 7 V Power Dissipation(PD) .................................... 3 W Storage Temperature Range(T ST) ..................... -65C To 150C Junction Temperature Range(T J) ..................... Thermal Resistance from Junction to Case(Rth JC) Thermal Resistance from Junction to Ambient(Rth JA) APE8955 -25C To 150C 15C/W 40C/W Operating Temperature Range(T OP) .................. -20C To + 85C Note. Rth JA is measured with the PCB copper area(need connect to Exposed pad) of approx. 1.5 in 2 (multi-layers) RECOMMENDED OPERATING CONDITIONS VCNTL Supply Voltage(VCNTL) ........................... +3.1 to 6 V VIN Supply Voltage(VIN) ................................. +1.1 to 3.3 V Output Voltage(VOUT) VCNTL=3.3V VCNTL=5V Junction Temperature Range(T J) ..................... +0.8 to 1.2 V +0.8 to VIN-0.2 V -25C To 125C Output Current(I OUT) ....................................... +0 to 5 A PACKAGE INFORMATION ESOP-8L (MP) (Top View) GND FB VOUT VOUT 1 8 EN POK VCNTL VIN 2 7 VIN 3 6 4 5 ELECTRICAL SPECIFICATIONS ( VCNTL=5V, VIN=1.5V, VOUT=1.2V, TA=25, unless otherwise specified) Parameter VCNTL POR Threshold VCNTL POR Hysteresis VIN POR Threshold VIN POR Hysteresis VCNTL Nominal Supply Current VCNTL Shutdown Current Feedback Voltage Load Regulation Dropout Voltage VDROP SYM VCNTL VCNTL(hys) VIN VIN(hys) ICNTL ISD VFB EN=VCNTL EN=0V VCNTL=3.3 ~ 5V IOUT = 0A ~ 5A IOUT = 5A, VCNTL=5V, TJ=25oC IOUT = 5A, VCNTL=5V, TJ=25~125oC TEST CONDITION MIN 2.7 0.8 0.4 0.784 TYP 2.9 0.4 0.9 0.5 1 18 0.8 0.06 0.15 MAX 3.1 1.0 2 30 0.816 0.3 0.2 0.25 UNITS V V V V mA uA V % V V 2 Advanced Power Electronics Corp. ELECTRICAL SPECIFICATIONS(Cont.) Soft Start Time EN Pin Logic High Threshold Voltage EN Hysteresis EN Pin Pull-Up Current Current Limit Under Voltage Threshold POK Threshold Voltage for Power OK POK Threshold Voltage for Power Not OK POK Low Voltage POK Delay Time Thermal Thutdown Temperature Thermal Thutdown Hysteresis TDELAY TSD TSS VENH Enable 0.4 IEN ILIM EN=GND VCNTL=3.3 ~ 5V, TJ=25 C VCNTL=3.3 ~ 5V, TJ=-25~125 C VFB Falling VPOK VPNOK VFB Rising VFB Falling POK Sinks 5mA o o APE8955 2 0.8 30 10 8 0.4 92% 81% 0.25 2 150 50 1.2 9 95% 84% 0.4 10 ms V mV uA A A V VFB VFB V ms C C 6 6 89% 78% 0.8 - - - PIN DESCRIPTIONS PIN SYMBOL GND FB VOUT EN POK VCNTL VIN PIN DESCRIPTION GND Pin Feedback Pin IC Power Supply Pin H : Normal Operation ; L : Shutdown Power OK Output Pin VCNTL Pin Input Voltage Input Voltage BLOCK DIAGRAM VIN C urrent Limit Soft-Start And Control Logic + N-MOSFET VOUT VCNTL Power -ON Reset Error Amp EN Enable Bandgap Thermal Shutdown + 0.4V UV FB + 90 % Vref POK GND Delay POK 3 Advanced Power Electronics Corp. FUNCTION PIN DESCRIPTION FB APE8955 Connecting this pin to an external resistor divider receives the feedback voltage of the regulator. The output voltage set by the resistor divider is determined by: VOUT = 0.8 x (1 + R1/R2) Where R1 is connected from VOUT to FB with Kelvin sensing and R2 is connected from FB to GND. A bypass capacitor may be connected with R1 in parallel to improve load transient response. The recommended R2 and R1 are in the range of 1k~100kohm. VIN and Exposed Pad Main supply input pins for power conversions. The exposed pad provides a very low impedance input path for the main supply voltage. Please tie the exposed pad and VIN Pin (Pin 5) together to reduce the dropout voltage. The voltage at this pin is monitored for Power-On Reset purpose. VCNTL Power input pin of the control circuitry. Connecting this pin to a +5V(recommended) supply voltage provides the bias for the control circuitry. The voltage at this pin is monitored for Power-On Reset purpose. POK Power-OK signal output pin. This pin is an open-drain output used to indicate status of output voltage by sensing FB voltage. This pin is pulled low when the rising FB voltage is not above the VPOK threshold or the falling FB voltage is below the VPNOK threshold, indicating the output is not OK. EN Enable control pin. Pulling and holding this pin below 0.4V shuts down the output. When re-enabled, the IC undergoes a new soft-start cycle. Left this pin open, an internal current source 10uA pulls this pin up to VCNTL voltage, enabling the regulator. VOUT Output of the regulator. Please connect Pin 3 and 4 together using wide tracks. It's necessary to connect an output capacitor with this pin for closed-loop compensation and improving transient responses. FUNCTION DESCRIPTION Power-On-Reset Power-On-Reset (POR) circuit monitors both input voltages at VCNTL and VIN pins to prevent wrong logic controls. The POR function initiates a soft-start process after the two supply voltages exceed their rising POR threshold voltages during powering on. The POR function also pulls low the POK pin regardless the output voltage when the VCNTL voltage falls below it's falling POR threshold. Internal Soft-Start An internal soft-start function controls rise rate of the output voltage to limit the current surge at start-up. The typical soft-start interval is about 2ms. Current Limit The APE8955 monitors the current via the output NMOS and limits the maximum current to prevent load and APE8955 from damage during overload or short circuit 4 Advanced Power Electronics Corp. FUNCTION DESCRIPTION(Cont.) Output Voltage Regulation APE8955 An error amplifier working with a temperature compensated 0.8V reference and an output NMOS regulates output to the preset voltage. The error amplifier designed with high bandwidth and DC gain provides very fast transient response and less load regulation. It compares the reference with the feedback voltage and amplifies the difference to drive the output NMOS which provides load current from VIN to VOUT. Under Voltage Protection (UVP) The APE8955 monitors the voltage on FB pin after soft-start process is finished. Therefore the UVP is disabling during soft-start. When the voltage on FB pin falls below the under-voltage threshold, the UVP circuit shuts off the output immediately. After a while, the APE8955 starts a new soft-start to regulate output. Thermal Shutdown A thermal shutdown circuit limits the junction temperature of APE8955. When the junction temperature exceeds +150C, a thermal sensor turns off the output NMOS, allowing the device to cool down. The regulator regulates the output again through initiation of a new soft-start cycle after the junction temperature cools by 50C, resulting in a pulsed output during continuous thermal overload conditions. 5 Advanced Power Electronics Corp. TYPICAL PERFORMANCE CHARACTERISTICS Dropout Voltage vs. Output Current 180 160 1.6 APE8955 VCNTL Supply Current vs. Temperature 125 100 75 50 25 0 -25 -40 1.4 Dropout Voltage (mV) 140 120 100 80 60 40 20 0 0 1 2 3 4 ICNTL(mA) 1.2 1 0.8 0.6 0.4 0.2 0 -40 5 -25 0 25 50 75 100 125 IOUT(A) Tem perature( ) Reference Voltage vs. Temperature 6.7 Current Limit vs. Temperature 0.814 6.6 Current Limit (A) 0.809 0.804 0.799 0.794 0.789 0.784 -40 6.5 VFB(V) 6.4 6.3 6.2 -25 0 25 50 75 100 125 6.1 -40 -25 0 25 50 75 100 125 Tem perature( ) Tem perature ( ) Current Limit EN Pin Floating Test VOUT VEN VOUT IOUT IOUT VPOK Ch1 : VOUT, 500mV/Div Ch2 : IOUT, 5A/Div Time : 2ms/Div Ch1 : VEN, 1V/Div Ch2 : VOUT, 5V/Div Ch3 : IOUT, 1A/Div Ch4 : VPOK, 1V/Div Time : 1ms/Div 6 Advanced Power Electronics Corp. TYPICAL PERFORMANCE CHARACTERISTICS Power ON Sequence APE8955 Power OFF Sequence VIN VOUT VPOK VCNTL VIN VOUT VPOK VCNTL Ch1 : VIN, 1V/Div Ch2 : VOUT, 1V/Div Ch3 : VPOK, 1V/Div Ch4 : VCNTL, 2V/Div Enable Sequence VEN VOUT IOUT VPOK Time : 10ms/Div Ch1 : VIN, 1V/Div Ch2 : VOUT, 1V/Div Ch3 : VPOK, 1V/Div Ch4 : VCNTL, 2V/Div Time : 10ms/Div Shutdown Sequence VEN VOUT IOUT V POK Ch1 : VEN, 5V/Div Ch2 : VOUT, 1V/Div Ch3 : IOUT, 1A/Div Ch4 : VPOK, 1V/Div POK Delay VIN Time : 1ms/Div Ch1 : VEN, 5V/Div Ch2 : VOUT, 1V/Div Ch3 : IOUT, 1A/Div Ch4 : VPOK, 1V/Div Time : 1ms/Div Load Transient Response VOUT VCNTL VPOK VOUT POK Delay IOUT Ch1 : VIN, 1V/Div Ch2 : VCNTL, 5V/Div Ch3 : VPOK, 1V/Div Ch4 : VOUT, 1V/Div Time : 500us/Div Ch1 : VOUT, 20mV/Div Ch2 : IOUT, 2A/Div Time : 100us/Div 7 ADVANCED POWER ELECTRONICS CORP. Package Outline : ESOP-8 P SYMBOLS MIN Millimeters NOM MAX A B C D E Q 5.80 4.80 3.80 0 0.40 0.19 0.00 0.35 1.35 6.00 4.90 3.90 4 0.65 0.22 0.08 0.42 1.55 0.375 REF. 45 1.27 TYP. 6.20 5.00 4.00 8 0.90 0.25 0.15 0.49 1.75 F M H L J K B G P A2 Q 3.15 2.25 3.25 2.35 3.35 2.45 L I J 1.All Dimension Are In Millimeters. 2.Dimension Does Not Include Mold Protrusions. Part Marking Information & Packing : ESOP-8 Part Number Package Code 8955MP YWWSSS Date Code (YWWSSS) YLast Digit Of The Year WWWeek SSSSequence 8 |
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