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| SMPS MOSFET PD- 95532 IRF740AS/LPbF Applications Switch Mode Power Supply ( SMPS ) l Uninterruptable Power Supply l High speed power switching l Lead-Free l HEXFET(R) Power MOSFET VDSS 400V Rds(on) max 0.55 ID 10A Benefits Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Effective Coss specified ( See AN 1001) l D 2 Pak TO-262 Absolute Maximum Ratings Parameter ID @ TC = 25C ID @ TC = 100C IDM PD @TA = 25C PD @TC = 25C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. 10 6.3 40 3.1 125 1.0 30 5.9 -55 to + 150 300 (1.6mm from case ) Units A W W/C V V/ns C Typical SMPS Topologies: l l Single transistor Flyback Xfmr. Reset Single Transistor Forward Xfmr. Reset ( Both for US Line Input only ) through are on page 10 Notes www.irf.com 1 7/20/04 IRF740AS/LPbF Static @ TJ = 25C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS IGSS Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. 400 --- --- 2.0 --- --- --- --- Typ. --- 0.48 --- --- --- --- --- --- Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 0.55 VGS = 10V, ID = 6.0A 4.0 V VDS = VGS, ID = 250A 25 VDS = 400V, VGS = 0V A 250 VDS = 320V, VGS = 0V, TJ = 125C 100 VGS = 30V nA -100 VGS = -30V Dynamic @ TJ = 25C (unless otherwise specified) gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 4.9 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- --- --- --- 10 35 24 22 1030 170 7.7 1490 52 61 Max. Units Conditions --- S VDS = 50V, ID = 6.0A 36 ID = 10A 9.9 nC VDS = 320V 16 VGS = 10V, See Fig. 6 and 13 --- VDD = 200V --- ID = 10A ns --- RG = 10 --- RD = 19.5,See Fig. 10 --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 320V, = 1.0MHz --- VGS = 0V, VDS = 0V to 320V Avalanche Characteristics Parameter EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Typ. --- --- --- Max. 630 10 12.5 Units mJ A mJ Thermal Resistance Parameter RJC RJA Junction-to-Case Junction-to-Ambient ( PCB Mounted, steady-state)* Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Typ. --- --- Max. 1.0 40 Units C/W Diode Characteristics Min. Typ. Max. Units IS ISM VSD trr Qrr ton Conditions D MOSFET symbol 10 --- --- showing the A G integral reverse --- --- 40 S p-n junction diode. --- --- 2.0 V TJ = 25C, IS = 10A, VGS = 0V --- 240 360 ns TJ = 25C, IF = 10A --- 1.9 2.9 C di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) 2 www.irf.com IRF740AS/LPbF 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP 100 I D , Drain-to-Source Current (A) 10 I D , Drain-to-Source Current (A) 10 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP 1 1 0.1 4.5V 4.5V 20s PULSE WIDTH TJ = 25 C 1 10 100 0.01 0.1 0.1 0.1 20s PULSE WIDTH TJ = 150 C 1 10 100 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 100 3.0 RDS(on) , Drain-to-Source On Resistance (Normalized) ID = 10A I D , Drain-to-Source Current (A) 2.5 10 TJ = 150 C 2.0 1.5 1 1.0 TJ = 25 C V DS = 50V 20s PULSE WIDTH 5.0 6.0 7.0 8.0 9.0 10.0 0.5 0.1 4.0 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3 IRF740AS/LPbF 20 ID = 10A VDS = 320V VDS = 200V VDS = 80V VGS , Gate-to-Source Voltage (V) 100000 10000 VGS = 0V, f = 1 MHZ Ciss = C + Cgd , C gs ds SHORTED Crss = C gd Coss = C + Cgd ds 16 C, Capacitance(pF) 1000 Ciss Coss 12 100 8 10 Crss 4 1 1 10 100 1000 0 FOR TEST CIRCUIT SEE FIGURE 13 0 10 20 30 40 VDS , Drain-to-Source Voltage (V) QG , Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 100 100 ISD , Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY RDS(on) 10us 10 ID , Drain Current (A) TJ = 150 C TJ = 25 C 1 10 100us 1ms 0.1 0.2 V GS = 0 V 0.4 0.6 0.8 1.0 1.2 1.4 1 TC = 25 C TJ = 150 C Single Pulse 10 100 10ms 1000 VSD ,Source-to-Drain Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRF740AS/LPbF 10.0 V DS VGS RG 10V Pulse Width 1 s Duty Factor 0.1 % RD 8.0 D.U.T. + ID , Drain Current (A) -VDD 6.0 4.0 Fig 10a. Switching Time Test Circuit 2.0 VDS 90% 0.0 25 50 TC , Case Temperature ( C) 75 100 125 150 Fig 9. Maximum Drain Current Vs. Case Temperature 10% VGS td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms 10 Thermal Response (Z thJC ) 1 D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1 10 0.01 0.001 0.00001 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRF740AS/LPbF EAS , Single Pulse Avalanche Energy (mJ) 15V 1400 1200 1000 800 600 400 200 0 TOP BOTTOM VDS L DRIVER ID 4.5A 6.3A 10A RG 20V D.U.T IAS tp + V - DD A 0.01 Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp 25 50 75 100 125 150 Starting TJ , Junction Temperature ( C) I AS Fig 12b. Unclamped Inductive Waveforms QG Fig 12c. Maximum Avalanche Energy Vs. Drain Current 10 V QGS QGD 580 VG V DSav , Avalanche Voltage ( V ) 560 Charge Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. 540 520 50K 12V .2F .3F D.U.T. VGS 3mA + V - DS 500 480 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 IAV , Avalanche Current ( A) IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit Fig 12d. Typical Drain-to-Source Voltage Vs. Avalanche Current 6 www.irf.com IRF740AS/LPbF Peak Diode Recovery dv/dt Test Circuit D.U.T + + Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer - + RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test + VDD Driver Gate Drive P.W. Period D= P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt VDD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS www.irf.com 7 IRF740AS/LPbF D2Pak Package Outline Dimensions are shown in millimeters (inches) D2Pak Part Marking Information (Lead-Free) T H IS IS AN IR F 5 3 0 S W IT H L O T CO D E 8 0 2 4 AS S E M B L E D O N W W 0 2 , 2 0 0 0 IN T H E AS S E M B L Y L IN E "L " N ote: "P " in as s em bly lin e po s i tion in dicates "L ead-F r ee" IN T E R N AT IO N AL R E CT IF IE R L O GO AS S E M B L Y L O T CO D E P AR T N U M B E R F 53 0 S D AT E CO D E Y E AR 0 = 2 0 0 0 W E E K 02 L IN E L OR IN T E R N AT IO N AL R E C T IF IE R L OG O AS S E M B L Y L OT CO D E P AR T N U M B E R F 530 S D AT E C O D E P = D E S IGN AT E S L E AD -F R E E P R O D U C T (O P T IO N AL ) Y E AR 0 = 2 0 0 0 WE E K 02 A = AS S E M B L Y S IT E C O D E 8 www.irf.com IRF740AS/LPbF TO-262 Package Outline TO-262 Part Marking Information E XAMPLE : T HIS IS AN IR L 3103L L OT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T HE AS S E MB LY LINE "C" Note: "P" in as s embly line pos ition indicates "L ead-F ree" INT ER NAT IONAL RE CT IF IE R LOGO AS S E MB LY L OT CODE PAR T NUMB ER DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C OR INT E R NAT IONAL R E CT IF IE R LOGO AS S E MBL Y L OT CODE PAR T NUMB ER DAT E CODE P = DE S IGNAT E S L EAD-F R E E PR ODUCT (OPT IONAL ) YE AR 7 = 1997 WE E K 19 A = AS S E MB L Y S IT E CODE www.irf.com 9 IRF740AS/LPbF D2Pak Tape & Reel Infomation TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135) FEED DIRECTION 1.85 (.073) 1.65 (.065) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 Notes: Repetitive rating; pulse width limited by Starting TJ = 25C, L = 12.6mH max. junction temperature. ( See fig. 11 ) Pulse width 300s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS RG = 25, IAS = 10A. (See Figure 12) TJ 150C ISD 10A, di/dt 330A/s, VDD V(BR)DSS, Uses IRF740A data and test conditions * When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.07/04 10 www.irf.com |
Price & Availability of IRF740ASPBF
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