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Very Low Input /Very Low Dropout 2 Amp Regulator With Enable
POWER MANAGEMENT Description
The SC4215A is a high performance positive voltage regulator designed for use in applications requiring very low input voltage and very low dropout voltage at up to 2 amperes. It operates with a Vin as low as 1.4V, with output voltage programmable as low as 0.5V. The SC4215A features ultra low dropout, ideal for applications where Vout is very close to Vin. Additionally, the SC4215A has an enable pin to further reduce power dissipation while shut- down. The SC4215A provides excellent regulation over variations in line, load and temperature. The SC4215A is available in the SOIC-8EDP (Exposed Die Pad) package. The output voltage can be set via an external divider or to fixed settings of 0.5V and 1.2V depending on how the FB pin is configured.
SC4215A
Features
Input Voltage as low as 1.4V 400mV dropout @ 2A Adjustable output from 0.5V Over current and over temperature protection Enable pin 10A quiescent current in shutdown Full industrial temperature range Available in SOIC-8EDP Lead-free package, fully WEEE and RoHS compliant
Applications
Telecom/Networking cards Motherboards/Peripheral cards Industrial applications Wireless infrastructure Set top boxes Medical equipment Notebook computers Battery powered systems
Typical Application Circuits
U1
4 NC VIN EN NC NC VO FB GND
5 6 7 8
VIN ENABLE
3 2 1
VO
R1
VO
C2
=
0.5 (R1 + R2) R2
Volts
SC4215A C1 R2
U1
4 NC VIN EN NC NC VO FB GND 5 6 7 8 4 NC VIN EN NC
U1
NC VO FB GND 5 6 7 8
VIN ENABLE
3 2 1
VO
VIN ENABLE
3 2 1
VO
VO
=
0.5V
VO
= 1.2V 1V
SC4215A C1 C2 C1
SC4215A C2
Revision: April 25, 2007
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SC4215A
POWER MANAGEMENT Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied.
Parameter Vin, EN, Vo, FB to GND Power Dissipation Thermal Resistance Junction to Ambient SOIC-8EDP(1) Thermal Resistance Junction to Case SOIC-8EDP(1) Operating Ambient Temperature Range Operating Junction Temperature Range Storage Temperature Range Lead Temperature (Soldering) 10 Sec. ESD Rating (Human Body Model)
Symbol
Max 7
Units V W C/W C/W C C C C kV
PD JA JC TA TJ TSTG TLEAD V ESD
Internally Limited 36 5.5 -40 to +85 -40 to +125 -65 to +150 300 2
Note: (1) 2 square inch of FR-4, double sided, 1 oz. minimum copper weight.
Electrical Characteristics
Unless specified: VEN = VIN, VFB = VO, VIN = 1.40V to 6.0V, VO = VIN -0.5V and IO = 10A to 2A. Values in bold apply over the full operating temperature range.
Parameter VIN Supply Voltage Range Quiescent Current
Symbol
Test Conditions
Min
Typ
Max
Units
VIN IQ VIN = 3.3V, IO = 0A VIN = 6.0V, VEN = 0V
1.40
6.0 3 10 50
V mA A
VO Output Voltage(1) (Fixed Voltage, VFB = 0) VO VIN = VO + 0.5V, IO = 10mA VIN = 1.8V, IO = 0.8A, 0C TJ = TA 85C Full IO and VIN range Line Regulation(1) Load Regulation(1) REG(LINE) REG(LOAD) IO = 10mA IO = 10mA to 2A -2% -3% 0.2 0.5 +2% +3% 0.4 1.5 %/V %
VO
V
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SC4215A
POWER MANAGEMENT Electrical Characteristics (Cont.)
Unless specified: VEN = VIN, VFB = VO, VIN = 1.40V to 6.0V, VO = VIN -0.5V and IO = 10A to 2A. Values in bold apply over the full operating temperature range.
Parameter VO (Cont.) Dropout Voltage(1)(2)
Symbol
Test Conditions
Min
Typ
Max
Units
IO = 1A IO = 1A, 1.6V VIN 6.0V VD IO = 1.5A IO = 1.5A, 1.6V VIN 6.0V IO = 2A, VO = VIN -0.6V IO = 2A, 1.6V VIN 6.0V
90
400 200
mV
200
500 300
mV
300
600 400 10
mV
Minimum Load Current(3)(4) Current Limit(4) F eed b ack Reference Voltage(1)
IO ICL 2.1 3
A A
4.4
VREF
VIN = 3.3V, VFB = VOUT, IO = 10mA
0.495 0.490
0.5
0.505 0.510
V
Feedback Pin Current(4) Feedback Pin Threshold(5) EN Enable Pin Current Enable Pin Threshold
IADJ VTH(FB)
VFB = VREF 0.05
80 0.16
200 0.40
nA V
IEN VIH VIL
VEN = 0V, VIN = 3.3V VIN = 3.3V VIN = 3.3V 1.6
1.5
10
A V
0.4
Over Temperature Protection High Trip level Hysteresis THI THYST 160 10 C C
Notes: (1) Low duty cycle pulse testing with Kelvin connections required. (2) Defined as the input to output differential at which the output voltage drops to 1.5% below the value measured at a differential of 0.8V. (3) Required to maintain regulation. Voltage set resistors R1 and R2 are usually utilized to meet this requirement. (4) Guaranteed by design. (5) When VFB exceeds this threshold, the "Sense Select" switch disconnects the internal feedback chain from the error amplifier and connects VFB instead.
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SC4215A
POWER MANAGEMENT Ordering Information
Part Number SC4215ASTRT(1)(2) S C 4215A E V B P ackag e SOIC-8EDP Temp. Range (TJ) -40 to +125C
Evaluation Board
Notes: (1) Only available in tape and reel packaging, 2500 devices for the SOIC-8EDP package. (2) Lead-free product. This product is fully WEEE and RoHS compliant.
Pin Configuration
Top View Bottom View
GND
NC EN VIN NC
SOIC-8EDP
GND FB VO NC
GND FB VO NC
8 7 6 5
Exposed Die Pad
1 2 3 4
NC EN VIN NC
SOIC-8EDP
Pin Descriptions
Pin # 2 Pin Name Pin Desciption EN Enable Input. Pulling this pin below 0.4V turns the regulator off, reducing the quiescent current to a fraction of its operating value. The device will be enabled if this pin is left open. Connect to VIN if not being used. Input voltage. For regulation at full load, the input to this pin must be between (VO+ 0.5V) and 6.0V. Minimum VIN = 1.4V. A large bulk capacitance should be placed closely to this pin to ensure that the input supply does not sag below 1.4V. Also a minimum of 4.7uF ceramic capacitor should be placed directly at this pin. The pin is the power output of the device. A minimum of 10uF capacitor should be placed directly at this pin. When this pin is grounded, an internal resistor divider sets the output voltage to 1.2V. If connected to the Vo pin, the output voltage will be set at 0.5V. If external feedback resistors are used, the output voltage will be (See Application Circuits on page 1): 0.5 (R1 + R2) VO = Volts R2 Reference ground. The GND pin and the exposed die pad must be connected together at the IC pin. No Connection.
3
VIN
6 7
VO FB
8 1,4,5
GND NC
THERMAL Pad for heatsinking purposes. Connect to ground plane using multiple vias. Not electrically connected PAD internally.
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SC4215A
POWER MANAGEMENT Block Diagram
1.5uA
FB 0 . 8V 5V REF
Marking Information
SC4215A yyww xxxxx
Top View yyww = Datecode (Example: 0552) xxxxx = Semtech Lot No. (Example: 00101)
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SC4215A
POWER MANAGEMENT Typical Characteristics
Region of Instability
Stable Region
Region of Instability
Region of Instability
Stable Region
Region of Instability
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SC4215A
POWER MANAGEMENT Applications Information
Introduction The SC4215A is intended for applications where high current capability and very low dropout voltage are required. It provides a very simple, low cost solution that uses very little PCB real estate. Additional features include an enable pin to allow for a very low power consumption standby mode, and a fully adjustable output. Component Selection Input capacitor: A large bulk capacitance 10F/A (output load) should be closely placed to the input supply pin of the SC4215A to ensure that Vin does not sag below 1.4V. Also a minimum of 4.7F ceramic capacitor is recommended to be placed directly next to the Vin pin. This allows for the device being some distance from any bulk capacitance on the rail. Additionally, input droop due to load transients is reduced, improving load transient response. Additional capacitance may be added if required by the application. Output capacitor: a minimum bulk capacitance of 10F/A (output load), along with a 0.1F ceramic decoupling capacitor is recommended. Increasing the bulk capacitance will improve the overall transient response. The use of multiple lower value ceramic capacitors in parallel to achieve the desired bulk capacitance will not cause stability issues. Although designed for use with ceramic output capacitors, the SC4215A is extremely tolerant of output capacitor ESR values and thus will also work comfortably with tantalum output capacitors. Noise immunity: in very electrically noisy environments, it is recommended that 0.1F ceramic capacitors be placed from IN to GND and OUT to GND as close to the device pins as possible. Internal voltage selection: By connecting the FB pin to GND, an internal resistor divider will regulate the output voltage to 1.2V. If the FB pin is connected directly to the VO pin, the output voltage will be regulated to the 0.5V internal reference. External voltage selection resistors: the use of 1% resistors, and designing for a current flow 10A is recommended to ensure a well regulated output (thus R2 50k).
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Enable: Pulling this pin below 0.4V turns the regulator off, reducing the quiescent current to a fraction of its operating value. A pull up resistor up to 400kOhms should be connected from this pin to the VIN pin in application where supply voltages of Vin < 1.9V is required. For applications with higher voltages than 1.9V, EN pin could be left open or connected to VIN. Thermal Considerations The power dissipation in the SC4215A is approximately equal to the product of the output current and the input to output voltage differential:
PD (VIN - VOUT
)* I O
The absolute worst-case dissipation is given by:
PD(MAX) = (VIN
(MAX)
- VOUT
(MIN)
)* I
O(MAX)
+ VIN
(MAX)
* I Q(MAX)
For a typical scenario, VIN = 3.3V 5%, VOUT = 2.8V and IO = 1A, therefore: VIN(MAX) = 3.465V, VOUT(MIN) = 2.744V and IQ(MAX) = 1.75mA, Thus PD(MAX) = .722W. Using this figure, and assuming TA(MAX) = 70C, we can calculate the maximum thermal impedance allowable to maintain TJ 150C:
R TH(J-A)(MAX) =
(T
J(MAX)
- TA(MAX) )
PD(MAX)
=
(150 - 70) = 110C/W
.722
This should be achievable for the SOIC-8EDP package using PCB copper area to aid in conducting the heat away, such as one square inch of copper connected to the ground pins of the device. Internal ground/power planes and air flow will also assist in removing heat. For higher ambient temperatures it may be necessary to use additional copper area.
SC4215A
POWER MANAGEMENT Outline Drawing - SOIC-8EDP
A N 2X E/2 E1 E 1 ccc C 2X N/2 TIPS 2 e/2 B D aaa C SEATING PLANE A2 A C bxN bbb F EXPOSED PAD H H GAGE PLANE 0.25 L (L1) h A1 C A-B D e D
DIMENSIONS INCHES MILLIMETERS DIM MIN NOM MAX MIN NOM MAX
A A1 A2 b c D E1 E e F H h L L1 N 01 aaa bbb ccc .053 .069 .000 .005 .049 .065 .020 .012 .007 .010 .189 .193 .197 .150 .154 .157 .236 BSC .050 BSC .116 .120 .130 .085 .095 .099 .010 .020 .016 .028 .041 (.041) 8 0 8 .004 .010 .008 1.35 1.75 0.00 0.13 1.25 1.65 0.31 0.51 0.17 0.25 4.80 4.90 5.00 3.80 3.90 4.00 6.00 BSC 1.27 BSC 2.95 3.05 3.30 2.15 2.41 2.51 0.25 0.50 0.40 0.72 1.04 (1.05) 8 0 8 0.10 0.25 0.20
h
c
01
SEE DETAIL SIDE VIEW
NOTES: 1.
A
DETAIL
A
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MS-012, VARIATION BA.
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SC4215A
POWER MANAGEMENT Land Pattern - SOIC-8EDP
E D
SOLDER MASK
DIM
(C) F G Z C D E F G P X Y Z
DIMENSIONS INCHES MILLIMETERS
(.205) .134 .201 .101 .118 .050 .024 .087 .291 (5.20) 3.40 5.10 2.56 3.00 1.27 0.60 2.20 7.40
Y THERMAL VIA O 0.36mm
NOTES: 1.
P X
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET.
2. REFERENCE IPC-SM-782A, RLP NO. 300A. 3. THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD SHALL BE CONNECTED TO A SYSTEM GROUND PLANE. FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR FUNCTIONAL PERFORMANCE OF THE DEVICE.
Contact Information
Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804
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