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| MC74F269 8-BIT BIDIRECTIONAL BINARY COUNTER The MC74F269 is a fully synchronous 8-stage up/down counter featuring a preset capability for programmable operation, carry look-ahead for easy cascading and a U/D input to control the direction of counting. All state changes, whether in counting or parallel loading, are initiated by the rising edge of the clock. * Synchronous Counting and Loading * Built-In Lookahead Carry Capability * Count Frequency 115 MHz Typical * Supply Current 95 mA Typical PIN ASSIGNMENT PE 24 P0 23 P1 22 P2 21 P3 20 VCC 19 P4 18 P5 17 P6 16 P7 15 TC CET 14 13 24 1 8-BIT BIDIRECTIONAL BINARY COUNTER FASTTM SCHOTTKY TTL J SUFFIX CERAMIC CASE 758-01 1 U/D 2 Q0 3 Q1 4 Q2 5 Q3 8 6 7 Q4 GND Q5 9 Q6 10 Q7 11 12 CP CEP 24 1 N SUFFIX PLASTIC CASE 724-03 24 1 DW SUFFIX SOIC CASE 751E-03 ORDERING INFORMATION MC74FXXXJ Ceramic MC74FXXXN Plastic MC74FXXXDW SOIC GUARANTEED OPERATING RANGES Symbol VCC TA IOH IOL Supply Voltage Operating Ambient Temperature Range Output Current High Output Current Low Parameter 74 74 74 74 Min 4.5 0 Typ 5.0 25 Max 5.5 70 -1.0 20 Unit V C mA mA FAST AND LS TTL DATA 4-138 MC74F269 FUNCTION TABLE Inputs Operating Mode Parallel Load Count Up Count Down Hold Do Nothing CP U/D X X h l X X CEP X X l l h X CET X X l l X h PE l l h h h h Pn l h X X X X Outputs Qn L H Count Up Count Down qn qn TC (a) (a) (a) (a) (a) H H = HIGH voltage level steady state h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition L = LOW voltage level steady state l = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition X = Don't care q = Lower case letters indicate the state of the referenced output prior to the LOW-to-HIGH clock transition = LOW-to-HIGH clock transition (a) = The TC is LOW when CET is LOW and the counter is at Terminal Count. Terminal Count Up is with all Qn outputs HIGH and Terminal Count Down is with all (a) = Qn outputs LOW. DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (Unless otherwise specified) Limits Symbol VOH VOL VIK IIH IIL IOS ICC Parameter Output HIGH Voltage Output LOW Voltage Input Clamp Diode Voltage Input HIGH Current 20 Input LOW Current Output Short Circuit Current (Note 2) Total Supply Current (total) ICCH ICCL - 60 93 98 - 0.6 -150 120 mA 125 VCC = MAX 74 2.7 74 3.4 0.35 0.5 -1.2 100 V V A mA mA Min 2.5 V IOH = -1.0 mA Typ Max Unit Test Conditions VCC = 4.5 V VCC = 4.75 V IOL = 20 mA, VCC = 4.5 V VCC = MIN, IIN = -18 mA VCC = MAX VIN = 7.0 V VIN = 2.7 V VCC = MAX, VIN = 0.5 V VCC = MAX, VOUT = 0 V (Note 3) (Note 4) NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under guaranteed operating conditions for the applicable device type. 2. Not more than one output should be shorted at a time, nor for more than 1 second. 3. PE = CET = CEP = U/D = GND: Pn = 4.5 V: CP = 4. PE = CET = CEP = U/D = GND: CP = FAST AND LS TTL DATA 4-139 MC74F269 LOGIC DIAGRAM P0 DETAIL A Q0 P1 P2 DETAIL A Q1 DETAIL A Q2 Q3 DETAIL A P3 DETAIL A Pn DATA D CP Q Q P4 DETAIL A Q4 P5 PE CLOCK P6 DETAIL A Q5 DETAIL A Q6 P7 CE CP U/D CEP CET DETAIL A Q7 TC FAST AND LS TTL DATA 4-140 MC74F269 AC ELECTRICAL CHARACTERISTICS 74F TA = +25C VCC = +5.0 V CL = 50 pF Symbol fMAX tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Parameter Maximum Clock Frequency Propagation Delay CP to Qn (Load) PE = LOW Propagation Delay CP to Qn (Count) PE = HIGH Propagation Delay CP to TC Propagation Delay CET to TC Propagation Delay U/D to TC Min 100 3.0 4.0 3.0 4.5 4.5 5.0 3.5 3.5 4.0 4.5 5.5 5.0 6.0 7.0 7.5 7.5 5.0 5.5 6.0 5.5 9.0 9.0 9.0 10 10 10 9.0 9.0 9.0 9.5 Typ Max 74F TA = 0C to +70C VCC = +5.0 V 10% CL = 50 pF Min 85 3.0 4.0 2.5 4.5 4.5 5.0 3.5 3.5 4.0 4.5 9.5 9.5 10 10.5 10.5 11 10 10 10 10 Max Unit MHz ns ns ns ns ns AC SETUP REQUIREMENTS 74F TA = +25C VCC = +5.0 V CL = 50 pF Min Set-up Time, HIGH or LOW P to CP Hold Time, HIGH or LOW P to CP Set-up Time, HIGH or LOW PE to CP Hold Time, HIGH or LOW PE to CP Set-up Time, HIGH or LOW CET, CEP to CP Hold Time, HIGH or LOW CET, CEP to CP Set-up Time, HIGH or LOW U/D to CP Hold Time, HIGH or LOW U/D to CP Clock Pulse Width CP 2.0 2.0 1.0 1.0 5.0 5.5 0 0 4.5 4.5 0 0 6.0 7.0 0 0 4.0 4.5 Typ Max 74F TA = 0C to +70C VCC = +5.0 V 10% CL = 50 pF Min 2.5 2.5 1.0 1.0 5.5 6.5 0 0 5.5 5.5 0 0 7.0 8.0 0 0 4.0 5.0 Typ Max Unit ns ns ns ns ns ns ns ns ns Parameter Symbol ts(H) ts(L) th(H) th(L) ts(H) ts(L) th(H) th(L) ts(H) ts(L) th(H) th(L) ts(H) ts(L) th(H) th(L) tw(H) tw(L) FAST AND LS TTL DATA 4-141 MC74F269 TIMING DIAGRAM PE P0 P1 P2 P3 P4 P5 P6 P7 CP U/D CEP AND CET Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 TC 253 254 255 0 1 2 2 1 0 255 254 253 LOAD COUNT UP INHIBIT COUNT DOWN FAST AND LS TTL DATA 4-142 |
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