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(R)
STS6DNF30L
DUAL N - CHANNEL 30V - 0.022 - 6A SO-8 STripFETTM POWER MOSFET
TYPE STS6DNF30L
s s
V DSS 30 V
R DS(on) < 0.025
ID 6A
s
TYPICAL RDS(on) = 0.022 STANDARD OUTLINE FOR EASY AUTOMATED SURFACE MOUNT ASSEMBLY LOW THRESHOLD DRIVE
DESCRIPTION This Power MOSFET is the second generation of STMicroelectronics unique " Single Feature SizeTM " strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS DC MOTOR DRIVE s DC-DC CONVERTERS s BATTERY MANAGMENT IN NOMADIC EQUIPMENT s POWER MANAGEMENT IN PORTABLE/DESKTOP PCs
s
SO-8
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol VDS V DGR V GS ID Parameter Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 k) Gate-source Voltage Drain Current (continuous) at Tc = 25 C Single Operation Drain Current (continuous) at T c = 100 o C Single Operation Drain Current (pulsed) Total Dissipation at T c = 25 C Dual Operation Total Dissipation at T c = 25 o C Sinlge Operation
o o
Value 30 30 20 6 3.8 24 2 1.6
Unit V V V A A A W W
IDM (*) P tot
(*) Pulse width limited by safe operating area
April 1999
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THERMAL DATA
R thj-amb
Tj Tstg
Single Operation Dual Operation Maximum Operating Junction Temperature Storage Temperature
*Thermal Resistance Junction-ambient
78 62.5 150 -65 to 150
o o
C/W C/W o C o C
(*) Mounted on FR-4 board (Steady State)
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF
Symbol V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Conditions I D = 250 A V GS = 0 Min. 30 1 10 100 Typ. Max. Unit V A A nA
Zero Gate Voltage V DS = Max Rating Drain Current (V GS = 0) V DS = Max Rating Gate-body Leakage Current (V DS = 0) V GS = 20 V
T c = 125 o C
ON ()
Symbol V GS(th) R DS(on) Parameter Gate Threshold Voltage V DS = V GS Static Drain-source On Resistance V GS = 10 V V GS = 4.5 V Test Conditions I D = 250 A ID = 3 A ID = 3 A 6 Min. 1 Typ. 1.6 0.022 0.025 Max. 2.5 0.025 0.032 Unit V A
I D(on)
On State Drain Current V DS > I D(on) x R DS(on)max V GS = 10 V
DYNAMIC
Symbol g fs () C iss C oss C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions V DS > I D(on) x R DS(on)max V DS = 25 V f = 1 MHz ID = 3 A V GS = 0 V Min. Typ. 9 1250 230 50 Max. Unit S pF pF pF
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ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symbol t d(on) tr Qg Q gs Q gd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions V DD = 15 V ID = 3 A R G = 4.7 V GS = 4.5 V (Resistive Load, see fig. 3) V DD = 24 V I D = 6 A V GS = 4.5 V Min. Typ. 22 30 17 4 6 23 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbol t d(of f) tf tr(Voff) tf tc Parameter Turn-off Delay Time Fall Time Off-voltage Rise Time Fall Time Cross-over Time Test Conditions V DD = 15 V ID = 3 A R G = 4.7 V GS = 4.5 V (Resistive Load, see fig. 3) V clamp = 24 V ID = 6 A R G = 4.7 V GS = 4.5 V (Inductive Load, see fig. 5) Min. Typ. 55 10 10 18 30 Max. Unit ns ns ns ns ns
SOURCE DRAIN DIODE
Symbol ISD I SDM (*) V SD () t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 6 A V GS = 0 30 30 2 I SD = 6 A di/dt = 100 A/s V DD = 20 V T j = 150 o C (see test circuit, fig. 5) Test Conditions Min. Typ. Max. 6 24 1.2 Unit A A V ns nC A
() Pulsed: Pulse duration = 300 s, duty cycle 1.5 % (*) Pulse width limited by safe operating area
Safe Operating Area
Thermal Impedance
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Output Characteristics Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
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Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
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Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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SO-8 MECHANICAL DATA
DIM. MIN. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 mm TYP. MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019
0016023
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
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