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  Datasheet File OCR Text:
 B-18
01/99
2N5020, 2N5021
P-Channel Silicon Junction Field-Effect Transistor
Analog Switches
Absolute maximum ratings at TA = 25C
Reverse Gate Source & Reverse Gate Drain Voltage Continuous Forward Gate Current Continuous Device Power Dissipation Power Derating Storage Temperature Range
- 50 V 50 mA 500 mW 4 mW/C - 65C to + 200C
At 25C free air temperature: Static Electrical Characteristics Gate Source Breakdown Voltage Gate Reverse Current Gate Source Cutoff Voltage Drain Saturation Current (Pulsed) Dynamic Electrical Characteristics Common Source Forward Transconductance Common Source Output Conductance Common Source Input Capacitance Common Source Reverse Transfer Capacitance gfs gos Ciss Crss V(BR)GDO IGSS VGS(OFF) IDSS
2N5020 Min 25 1 0.3 1.5 Max
2N5021 Min 25 1 0.5 -1 2.5 - 3.5 Max Unit V nA V mA
Process PJ32 Test Conditions IG = 1A, VDS = OV VGS = 15V, VDS = OV VDS = - 15V, ID = 1 nA VDS = - 15V, VGS = OV
- 0.3 - 1.2
1
3.5 20 25 7
1.5
6 20 25 7
mS S pF pF
VDS = - 15V, VGS = OV VDS = - 15V, VGS = OV VDS = - 15V, VGS = OV VDS = - 15V, VGS = OV f = 1 MHz f = 1 MHz
TO18 Package
Dimensions in Inches (mm)
Surface Mount
SMP5020, SMP5021
Pin Configuration
1 Source 1, 2 Gate & Case, 3 Drain 1000 N. Shiloh Road, Garland, TX 75042 (972) 487-1287 FAX (972) 276-3375
www.interfet.com


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