| PART |
Description |
Maker |
| CY7C1168V18-400BZXC CY7C1168V18-375BZXC CY7C1168V1 |
1M X 18 DDR SRAM, 0.45 ns, PBGA165 13 X 15 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 1M X 18 DDR SRAM, 0.45 ns, PBGA165
2M X 8 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
| MK48T87A |
CMOS 64 x 8 Address / Data Multiplexed Timekeeper SRAM
|
ST Microelectronics
|
| IS82C600 |
TRAILBLAZER High-Speed SRAM with Address Decoding and Ready Logic 的TrailBlazer高速的地址译码和就绪逻辑中的SRAM
|
Integrated Silicon Solution, Inc.
|
| CY7C1277V18-300BZC CY7C1266V18-300BZXC CY7C1266V18 |
36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 4M X 9 DDR SRAM, 0.45 ns, PBGA165
36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 4M X 8 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CY7C1550KV18-450BZC CY7C1550KV18-400BZC CY7C1548KV |
Sync SRAM; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 2M X 36 DDR SRAM, 0.45 ns, PBGA165
72-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
|
Cypress Semiconductor, Corp.
|
| CY7C1263XV18 CY7C1265XV18-633BZXC CY7C1263XV18-600 |
36-Mbit QDR? II Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency)
36-Mbit QDRII Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency)
|
Cypress Semiconductor
|
| HSDL-7000 |
IR 3/16 Encode/Decode IC
|
AVAGO TECHNOLOGIES LIMITED
|
| VAC068 VAC068A VAC068A-BC VAC068A-GC VAC068A-GI VA |
VMEbus Address Controller
LJT 128C 128#22D PIN PLUG
VMEbus Address Controller VME BUS CONTROLLER, CQFP160
VMEbus Address Controller VME总线地址控制
VMEbus Address Controller VME BUS CONTROLLER, CPGA145
|
CYPRESS[Cypress Semiconductor]
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| CY7C11661KV18 CY7C11681KV18 CY7C11681KV18-400BZC C |
18-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)
|
Cypress Semiconductor
|
| CY7C1541V18-08 |
72-Mbit QDR?II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
|
Cypress Semiconductor
|
