|
|
![](images/bg04.gif) |
![EPF10K30EQC208-3 EPF10K130EFC484-1 EPF10K200E EPF10K200S EPF10K30E EPF10K50E EPF10K50S FLEX10KE](Maker_logo/altera_corporation.GIF)
ALTERA[Altera Corporation]
|
Part No. |
EPF10K30EQC208-3 EPF10K130EFC484-1 EPF10K200E EPF10K200S EPF10K30E EPF10K50E EPF10K50S FLEX10KE
|
OCR Text |
...nternal tri-state buses - Up to six global clock signals and four global clear signals Powerful I/O pins - Individual tri-state output enabl...pack (TQFP), plastic quad flat pack (PQFP), power quad flat pack (RQFP), pin-grid array (PGA), and b... |
Description |
Embedded Programmable Logic Device IC,FPGA,216-CELL,CMOS,QFP,208PIN,PLASTIC
|
File Size |
577.39K /
100 Page |
View
it Online |
Download Datasheet
|
|
|
![](images/bg04.gif) |
![EPC1](Maker_logo/altera_corporation.GIF)
Altera Corporation
|
Part No. |
EPC1
|
OCR Text |
...vices (1) Four EPC2 devices (1) Six EPC2 devices (1) Eight EPC2 devices (1) EPC2, EPC1, or EPC1441 EPC2, EPC1, or EPC1441 EPC2 or EPC1 EPC2 or two EPC1 devices EPC2, EPC1, or EPC1441 EPC2, EPC1, or EPC1441 EPC2 or EPC1 EPC2, EPC1, or EPC144... |
Description |
Configuration Devices for ACEX, APEX, FLEX & Mercury Devices
|
File Size |
198.36K /
28 Page |
View
it Online |
Download Datasheet
|
|
|
![](images/bg04.gif) |
Motorola
|
Part No. |
MC68060
|
OCR Text |
...line hold condition exists. The six stages in the dual integer execution pipelines are: 1) Instruction Decode--The instruction is fully decoded. 2) Effective Address Calculation--If the instruction calls for data from memory, the location o... |
Description |
Product Brief Superscalar 32-Bit Microprocessors
|
File Size |
68.41K /
10 Page |
View
it Online |
Download Datasheet
|
|
![](images/findchips_sm.gif)
Price and Availability
|