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ICST[Integrated Circuit Systems]
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Part No. |
ICS308RT ICS308 ICS308R ICS308RI ICS308RIT
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OCR Text |
...
V DD 3
CLK1
P LL1
CLK2 Divide Logic and Output Enable Control CLK3 CLK4 CLK5 CLK6 CLK7 CLK8 CLK9
STROBE SCLK DATA
P LL3 C rysta...by the VersaClockTM software are written in DATA pin in this order: MSB (left most bit) first. As sh... |
Description |
SERIAL PROGRAMMABLE QUAD PLL VERSACLOCK SYNTHESIZER
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File Size |
94.43K /
8 Page |
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it Online |
Download Datasheet
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Integrated Circuit Syst...
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Part No. |
ICS9161A-01CW16
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OCR Text |
...y resolution from optional pre- divide by 2 on the m counter output enable feature available for tristating outputs independent clock outputs range from 390 khz to 120 mhz for vdd >4.75v power-down capabilities low power, high speed... |
Description |
Dual Programmable Graphics Frequency Generator
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File Size |
455.06K /
15 Page |
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it Online |
Download Datasheet
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ICST[Integrated Circuit Systems]
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Part No. |
ICS343MP ICS343 ICS343MIP ICS343MLF
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OCR Text |
...equencies with available output divide values and provides an easy to understand, bar code rating for the target output frequencies. The use...By modulating the output clock frequencies, the device effectively lowers energy across a broader ra... |
Description |
Field Programmable Triple Output SS VersaClock Synthesizer
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File Size |
94.95K /
7 Page |
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it Online |
Download Datasheet
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Integrated Circuit Syst... ICST[Integrated Circuit Systems]
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Part No. |
ICS525R-03IT ICS525-03 ICS525R-03I ICS525R-03ILF ICS525R-03ILFT
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OCR Text |
... PECL
CLK2
CMOS PECL
Pre-divide (P)
2 1
28-pin SSOP
Output Divider and Maximum Output Frequency Table S0
pin 5 0 0 0 0 1 1 1 ...by user. Forms a binary number from 0 to 127. Select pins for output divider determined by user. See... |
Description |
PECL Input OSCaR-TM USER Configurable Clock
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File Size |
89.65K /
7 Page |
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it Online |
Download Datasheet
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Price and Availability
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