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IDT
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Part No. |
IDTCSPT857C
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OCR Text |
... 48-pin TSSOP and TVSOP, 40-pin MLF, and 56-pin VFBGA packages
The CSPT857C is a PLL based clock driver that acts as a zero delay buffer to distribute one differential clock input pair(CLK, CLK ) to 10 differential output pairs (Y [0:9],... |
Description |
2.5V - 2.6V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER
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File Size |
135.63K /
15 Page |
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it Online |
Download Datasheet
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IDT
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Part No. |
IDTCSPU877
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OCR Text |
...ble in 52-Ball VFBGA and 40-pin MLF packages
APPLICATIONS:
* Meets or exceeds JEDEC standard 82.8 for registered DDR2 clock driver * Along with SSTU32864/A, DDR2 register, provides complete solution for DDR2 DIMMs
The CSPU877 is a ... |
Description |
1.8V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER
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File Size |
136.73K /
13 Page |
View
it Online |
Download Datasheet
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Price and Availability
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