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Maxim Integrated Products, Inc.
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| Part No. |
MAX3892EGH-D
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| OCR Text |
....3v supply, this device accepts low-voltage differential-signal (lvds) clock and data inputs for interfacing with high-speed digital circuit...jitter generation ? 4 ? 4-bit fifo input buffer ? 622mbps/666mbps parallel to 2.5gbps/2.7gbps seria... |
| Description |
3.3V, 2.5Gbps/2.7Gbps, SDH/SONET 4:1 Serializer with Clock Synthesis SERIAL TO PARALLEL/PARALLEL TO SERIAL CONVERTER, QCC44
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| File Size |
265.87K /
16 Page |
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it Online |
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Avago Technologies, Ltd.
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| Part No. |
HFBR-5905
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| OCR Text |
low cost 2 x 5 package style technical data hfbr-5905 1300 nm 2 km features ? multisourced 2 x 5 package style with mt-rj receptacle singl...jitter without violating the annex b allocation example. in practice, the typical contribution of th... |
| Description |
FIBER OPTIC TRANSCEIVER 光纤收发
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| File Size |
300.35K /
14 Page |
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it Online |
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Cypress Semiconductor, Corp.
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| Part No. |
CY24204ZXC-3
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| OCR Text |
...grated phase-locked loop (pll) low jitter, high-accuracy outputs vcxo with analog adjust 3.3v operation benefits internal pll with up to 400-mhz internal operation meets critical timing requirem ents in complex system designs large 1... |
| Description |
MediaClock™ DTV, STB Clock Generator 74.25 MHz, VIDEO CLOCK GENERATOR, PDSO16
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| File Size |
172.04K /
7 Page |
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it Online |
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Applied Micro Circuits, Corp.
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| Part No. |
TM311DVA
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| OCR Text |
...tional return loss ( > -15db) n low transmit/receive jitter n small footprint for surface mounting n low power dissipation; 475 mw typical n complies with ansi, bellcore, and itu-t/g.703 specifications applications n stm-1 or e4-based tran... |
| Description |
Copperhead Series CMI Transceiver line interface modules(SONET/SDH应用的Copperhead系列CMI收发器线接口模块) 铜斑蛇系列海事收发器线路接口模块（SONET / SDH的应用的铜斑蛇系列母语收发器线接口模块）
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| File Size |
321.47K /
12 Page |
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Micrel Semiconductor, Inc.
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| Part No. |
SY58035U SY58035UMITR
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| OCR Text |
low skew copies of the selected input 2:1 mux input included for clock switchover applications guaranteed ac performance over temperature ...jitter design: ? <1ps rms random jitter ? <10ps pp total jitter (clock) ? <1ps rms cycle-to-cycle... |
| Description |
4.5GHz, 1:6 LVPECL FANOUT BUFFER WITH 2:1 MUX INPUT AND INTERNAL TERMINATION 4.5GHz:6的LVPECL扇出缓冲器与2:1 MUX输入和内部终
4.5GHz, 1:6 LVPECL FANOUT BUFFER WITH 2:1 MUX INPUT AND INTERNAL TERMINATION 58035 SERIES, LOW SKEW CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC32
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| File Size |
102.99K /
11 Page |
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it Online |
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Price and Availability
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