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				Cypress Semiconductor
Part No.	CY7C1911CV18
OCR Text	...ite reg write reg write reg c c 256k x 18 array 256k x 18 array 256k x 18 array 256k x 18 array 128k x 36 array clk a (16:0) gen. k k contro...512k x 36) 1234567891011 a cq nc/288m nc/72m wps bws 2 k bws 1 rps nc/36m nc/144m cq b q27 q18 d18 a...
Description	(CY7C1x1xCV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture
File Size	468.97K / 31 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1911BV18
OCR Text	...ic block diagram (cy7c1313bv18) 256k x 18 array clk a (17:0) gen. k k control logic address register d [17:0] read add. decode read data reg...512k x 36) [+] feedback [+] feedback www.datasheet.in c y7 c 1311bv18 cy7c1911bv18 cy7c1313bv...
Description	(CY7C1x1xBV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture
File Size	535.56K / 28 Page	View it Online	Download Datasheet

				IDT
Part No.	IDT71V67702S80BQ IDT71V67702S80BGI8 IDT71V67702S80BG8 IDT71V67702S75PFI8 IDT71V67702S75PF8 IDT71V67702S75BQI IDT71V67702S75BGI8 IDT71V67702S75BG8
OCR Text	...pply n/a 5317 tbl 01 features u 256k x 36, 512k x 18 memory configurations u u u u u supports fast access times: C 7.5ns up to 117mhz clock frequency C 8.0ns up to 100mhz clock frequency C 8.5ns up to 87mhz clock frequency u lbo lbo lbo lbo...
Description	3.3V 256k x 36 Synchronous 2.5V I/O Flowthrough SRAM
File Size	986.31K / 23 Page	View it Online	Download Datasheet

				IDT
Part No.	IDT71V67602S150BQ IDT71V67802S150BQ IDT71V67802S150BQI
OCR Text	...5311 tbl 01 features u u u u u 256k x 36, 512k x 18 memory configurations u u u u u supports high system speed: C 166mhz 3.5ns clock access time C 150mhz 3.8ns clock access time C 133mhz 4.2ns clock access time u u u u u lbo lbo l...
Description	3.3V 256k x 36 Synchronous 2.5V I/O PipeLined SRAM 3.3V 512k x 18 Synchronous 2.5V I/O PipeLined SRAM
File Size	979.84K / 23 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C2263XV18 CY7C2265XV18
OCR Text	...ic block diagram ? cy7c2265xv18 256k x 36 array clk a (17:0) gen. k k control logic address register d [35:0] read add. decode read data reg. rps wps control logic address register reg. reg. reg. 72 18 144 36 bws [3:0] v ref write add. deco...
Description	36-Mbit QDR? II Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT
File Size	1,079.78K / 29 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1303CV25-167BZC CY7C1306CV25-167BZC CY7C1306CV25-167BZXC CY7C1306CV25-167BZI CY7C1306CV25-167BZXI CY7C1303CV25-167BZXC
OCR Text	...8 write reg c c 512k x 18 array 256k x 36 array clk a (17:0) gen. k k control logic address register d [35:0] read add. decode read data reg. rps wps control logic address register reg. reg. reg. 36 18 72 36 bws [3:0] v ref write add. decod...
Description	18-Mbit Burst of 2 Pipelined SRAM with QDR Architecture
File Size	356.45K / 21 Page	View it Online	Download Datasheet

				Cypress Semiconductor, Corp. CYPRESS SEMICONDUCTOR CORP
Part No.	CY14B104NA-ZSP20XCT CY14B104NA-ZSP20XIT CY14B104LA-BA25XC CY14B104NA-BA20XC
OCR Text	256k x 16) nvsram cypress semiconductor corporation ? 198 champion court ? san jose , ca 95134-1709 ? 408-943-2600 document #: 001-49918 rev...512k x 8 (cy14b104la) or 256k x 16 (cy14b104na) hands off automatic store on power down with onl...
Description	4 Mbit (512k x 8/256k x 16) nvSRAM; Organization: 256kb x 16; Vcc (V): 2.7 to 3.6 V; Density: 4 Mb; Package: TSOP 256k X 16 NON-VOLATILE SRAM, 20 ns, PDSO54 4 Mbit (512k x 8/256k x 16) nvSRAM; Organization: 512kb x 8; Vcc (V): 2.7 to 3.6 V; Density: 4 Mb; Package: FBGA 4 Mbit (512k x 8/256k x 16) nvSRAM; Organization: 256kb x 16; Vcc (V): 2.7 to 3.6 V; Density: 4 Mb; Package: FBGA
File Size	613.78K / 23 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1413BV18
OCR Text	...k x 18 array 512k x 18 array 18 256k x 36 array clk a (17:0) gen. k k control logic address register d [35:0] read add. decode read data reg. rps wps control logic address register reg. reg. reg. 72 18 144 36 bws [3:0] v ref write add. deco...
Description	(CY7C14xxBV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture
File Size	492.43K / 30 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1263KV1812
OCR Text	...ic block diagram ? cy7c1265kv18 256k x 36 array clk a (17:0) gen. k k control logic address register d [35:0] read add. decode read data reg. rps wps control logic address register reg. reg. reg. 72 18 144 36 bws [3:0] v ref write add. deco...
Description	36-Mbit QDR? II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency)
File Size	627.13K / 30 Page	View it Online	Download Datasheet

				Cypress Semiconductor, Corp.
Part No.	CY7C1263V18-300BZI
OCR Text	...eg write reg 18 cq cq doff qvld 256k x 36 array clk a (17:0) gen. k k control logic address register d [35:0] read add. decode read data reg...512k x 18) for cy7c1263v18 and 1m x 36 (4 arrays each of 256k x 36) for cy7c1265v18 . therefore, o...
Description	36-Mbit QDRII SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 2M X 18 QDR SRAM, 0.45 ns, PBGA165
File Size	434.14K / 29 Page	View it Online	Download Datasheet

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