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Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
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| Part No. |
CY39050Z208-83NTC CY3930V388-83NTC CY39050V484-83NTC CY39050V208-83NTC CY3930V676-83NTC CY3930V484-83NTC CY3930V256-83NTC CY3930Z208-83NTC CY39050V676-83NTC CY39030Z484-83NTC CY39050Z388-83NTC CY39030Z256-83NTC CY39050Z256-83NTC CY39050Z484-83NTC CY39030Z388-83NTC CY3930V484-125MGI CY39030Z484-125MBI CY39030Z484-125MGC CY39050V256-83NTC CY39050V484-125MGC CY3930V484-125MGC CY39030Z484-125MGI CY39050Z676-83NTC CY3930V208-83NTC CY39050V484-125MBC CY39050V388-83NTC CY39030Z676-83NTC CY39050V484-125MBI CY39030Z484-125MBC CY3930V208-83NI CY3930Z208-83NI CY39030Z676-233NTC CY39030Z676-200NTC CY39030Z676-200NTI CY39030Z676-233NTI CY39165Z676-200NTI CY39165Z676-233NTI CY39050V208-200MGI CY39050V208-200MGC CY39050Z208-125MGC CY39050V208-233MGC CY39050V208-233MGI CY39050V208-83MGC CY39050V208-83MGI CY39050V208-233BBC CY39050V208-233BBI CY39050V208-233BGC CY39050V208-233MBI CY39050V388-125BBC CY39050V208-233BGI CY39050V208-233MBC CY39050V208-233NC CY39050V388-125BBI CY39050V388-125BGC CY39050V388-125BGI CY39030Z388-233NI CY39050V388-233NI CY39050V484-233NI CY39030Z484-200MBI CY3930V388-233NI CY39030Z484-200MGI CY39050Z388-233NI CY39050Z676-233NI CY39030Z484-200MGC CY39030Z676-233NI CY39050Z48
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| OCR Text |
...8 96 24 218 233 7.2 5 ma 39k100 46k ? 144k 1536 192 48 302 222 7.5 10 ma 39k165 77k ? 241k 2560 320 80 386 181 8.5 20 ma 39k200 92k ? 288k 3072 384 96 428 181 8.5 20 ma notes: 1. upper limit of typical gates is calculated by assuming only 1... |
| Description |
Evaluation Board for ADXL346 - 3-Axis, ±2 g/±4 g/±8 g/±16 g Ultralow Power Digital Accelerometer
50 MHz to 4.0 GHz RF/IF Gain Block; Package: 3-pin; Temperature Range: -40°C to 125°C
Triple Skew-Compensating Video Delay Line with Analog and Digital Control; Package: 32-LFCSP (5x5mm w/3.5mm exposed pad); Temperature Range: -40°C to 125°C
3-Axis, ±2 g/±4 g/±8 g/±16 g Ultralow Power Digital Accelerometer; Package: 16-LGA; Temperature Range: -40°C to 125°C
CPLDs at FPGA Densities CPLD器件在FPGA的密
CPLDs at FPGA Densities LOADABLE PLD, 8.5 ns, PBGA676
CPLDs at FPGA Densities LOADABLE PLD, 7.2 ns, PQFP208
CPLDs at FPGA Densities LOADABLE PLD, 7.2 ns, PBGA256
CPLDs at FPGA Densities LOADABLE PLD, 10 ns, PBGA388
CPLDs at FPGA Densities LOADABLE PLD, 15 ns, PQFP208
CPLDs at FPGA Densities LOADABLE PLD, 15 ns, PBGA256
CPLDs at FPGA Densities LOADABLE PLD, 15 ns, PBGA484
CPLDs at FPGA Densities LOADABLE PLD, 15 ns, PBGA676
CPLDs at FPGA Densities LOADABLE PLD, 10 ns, PBGA676
CPLDs at FPGA Densities LOADABLE PLD, 10 ns, PBGA256
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| File Size |
1,243.04K /
86 Page |
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Cypress Semiconductor, Corp.
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| Part No. |
CY39100V388B-83MGC CY39100V208B-125NTXC CY39050V208-125NTC
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| OCR Text |
...8 96 24 218 233 7.2 5 ma 39k100 46k ? 144k 1536 192 48 302 222 7.5 10 ma 39k200 92k ? 288k 3072 384 96 428 181 8.5 20 ma notes: 1. upper limit of typical gates is calculated by as suming only 10% of the channel memory is used. 2. standby i ... |
| Description |
Delta39K™ ISR™ CPLDs at FPGA Densities™ LOADABLE PLD, 15 ns, PBGA388
Delta39K™ ISR™ CPLDs at FPGA Densities™ LOADABLE PLD, 10 ns, PQFP208
CPLDs at FPGA Densities LOADABLE PLD, 10 ns, PQFP208
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| File Size |
1,758.79K /
86 Page |
View
it Online |
Download Datasheet |
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DATA DEVICE CORP
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| Part No. |
SD-14590D4-125S SD-14592D4-125S
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| OCR Text |
...85k 11.8 v l-l 26 v l-l 23k 50k 46k 100k 23k 50k 25 max 60 max sin and cos resolver signals referenced to converter inter- nal dc reference v. 1 v nominal, 1.15 v max 15 v continuous 100 v peak transient zin > 20m//10 pf voltage follower t... |
| Description |
SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, MDMA36
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| File Size |
121.04K /
12 Page |
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it Online |
Download Datasheet |
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Price and Availability
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