Synchronous DRAM(4M X 8 Bit X 4 Banks) Synchronous DRAM(4M X 8 Bit X 4 Banks) 同步DRAM4米8位4银行 Synchronous DRAM(4M X 8 Bit X 4 Banks) 同步DRAM米8位4银行 133 Mhz LVTTL synchronous DRAM, 4 M x 8 bit x 4 banks
16 bits x 4 banks. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock...14 15 16 17 18 19 20 21 22 23 24 25 26 27
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Description
Synchronous DRAM(2M X 16 Bit X 4 Banks) Synchronous DRAM(2M X 16 Bit X 4 Banks) 同步DRAM米16位4个银行)