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IDT
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| Part No. |
IDT72V36100 72V3690
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| OCR Text |
... (7.5 ns read/write cycle time) User selectable input and output port bus-sizing - x36 in to x36 out - x36 in to x18 out - x36 in to x9 out - x18 in to x36 out - x9 in to x36 out Big-Endian/Little-Endian user selectable byte representation ... |
| Description |
3.3 VOLT HIGH-DENSITY SUPERSYNC™ II 36-BIT FIFO
From old datasheet system
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| File Size |
562.55K /
36 Page |
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IDT
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| Part No. |
IDT72T36105 IDT72T36115
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| OCR Text |
... to 225 MHz Operation of Clocks User selectable HSTL/LVTTL Input and/or Output 2.5V LVTTL or 1.8V, 1.5V HSTL Port Selectable Input/Ouput voltage 3.3V Input tolerant Read Enable & Read Clock Echo outputs aid high speed operation User selecta... |
| Description |
2.5 VOLT HIGH-SPEED TeraSync? FIFO 36-BIT CONFIGURATIONS
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| File Size |
530.30K /
57 Page |
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it Online |
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INTEGRATED DEVICE TECHNOLOGY INC
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| Part No. |
72T4098L6-7BBG 72T40108L6-7BBGI
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| OCR Text |
...o sdr -sdr to ddr -sdr to sdr ? user selectable hstl or lvttl i/os ? read enable & read clock echo outputs aid high speed operation ? ? ? ? ? 2.5v lvttl or 1.8v, 1.5v hstl port selectable input/ouput voltage ? ? ? ? ? 3.3v input tolerant ? ... |
| Description |
32K X 40 OTHER FIFO, 3.8 ns, PBGA208
64K X 40 OTHER FIFO, 3.8 ns, PBGA208
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| File Size |
479.37K /
52 Page |
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