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For predictable Found Datasheets File :: 1773    Search Time::1.672ms    
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    74HC166 74HCT166 74HC166PW 74HC166D 74HC166DB 74HC166N 74HCT166D 74HCT166DB 74HCT166N 74HCT166PW

PHILIPS[Philips Semiconductors]
NXP Semiconductors N.V.
Part No. 74HC166 74HCT166 74HC166PW 74HC166D 74HC166DB 74HC166N 74HCT166D 74HCT166DB 74HCT166N 74HCT166PW
OCR Text ...take place while CP is HIGH for predictable operation. A LOW on the master reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all bit positions to a LOW state. QUICK REFERENCE DATA GND = 0 V; Tamb...
Description 74HC/HCT166; 8-bit parallel-in/serial-out shift register

File Size 93.07K  /  10 Page

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    74HC74 74HC74D 74HC74N 74HCT74 74HCT74D 74HCT74DB 74HCT74N 74HCT74PW

Philips Semiconductors
Part No. 74HC74 74HC74D 74HC74N 74HCT74 74HCT74D 74HCT74DB 74HCT74N 74HCT74PW
OCR Text ...OW-to-HIGH clock transition for predictable operation. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times. TYPICAL SYMBOL tPHL/ tPLH PARAMETER propagation delay nCP to nQ, nQ n...
Description Dual D-type flip-flop with set and reset positive-edge trigger
Dual D-type flip-flop with set and reset; positive-edge trigger

File Size 98.80K  /  13 Page

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    74LVC109 74LVC109D 74LVC109DB 74LVC109PW 74LVC109PWDH 74LVC109_3

NXP Semiconductors
PHILIPS[Philips Semiconductors]
Part No. 74LVC109 74LVC109D 74LVC109DB 74LVC109PW 74LVC109PWDH 74LVC109_3
OCR Text ...OW-to-HIGH clock transition for predictable operation. The JK design allows operation as a D-type flip-flop by tying the J and K inputs together. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock ri...
Description From old datasheet system
Dual JK flip-flop with set and reset; positive-edge trigger

File Size 103.23K  /  10 Page

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    CTS, Corp.
Actel, Corp.
Part No. A54SX08-1FG144 A54SX08-1FG144I A54SX08-1TQ144 A54SX08-1TQ176I A54SX08-1TQ144I A54SX08-3VQ100 A54SX08-3TQ144 A54SX08-3TQ176 A54SX08-TQ176I A54SX08-TQ144 A54SX08-TQ144I A54SX32-2TQ144 A54SX32-3TQ144 A54SX32-2TQ176 A54SX32-TQ144 A54SX32-TQ144I A54SX32-TQ176M A54SX32-2TQ144I A54SX32-2TQ176I A54SX32-TQ144M A54SX32-3BG313 A54SX32-1TQ144I A54SX32-1TQ144M A54SX32-3BG329 A54SX08-2TQ144 A54SX08-2TQ176I A54SX08-PL84 A54SX08-VQ100 A54SX08-VQ100I A54SX08-2TQ144I A54SX16-2TQ176I A54SX16-3TQ176 A54SX16-VQ100I A54SX16-1TQ176 A54SX08-1VQ100 A54SX08-2VQ100I A54SX08-1VQ100I A54SX08-2FG144I A54SX08-2PL84 A54SX08-1PL84 A54SX08-1PL84I A54SX32-1BG329I A54SX16-1VQ100 A54SX16-1VQ100M A54SX16-1VQ100I A54SX16P-2TQ176 A54SX16P-2TQ176I A54SX16P-1VQ100I A54SX16P-2VQ100I A54SX16P-1TQ176I A54SX32-2BG329 A54SX32-2BG313I A54SX16P-VQ100 A54SX16P-TQ144
OCR Text ...ed in sx devices gives fast and predictable performance, allows 100 percent pin-locking with full logic utilization, enables concurrent pcb development, reduces design time, and allows designers to achieve performance goals with minimum eff...
Description Field Programmable Gate Array (FPGA) 现场可编程门阵列(FPGA

File Size 581.30K  /  70 Page

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    74LVC377 74LVC377D 74LVC377DB 74LVC377PW 74LVC377PWDH 74LVC377_2

NXP Semiconductors
PHILIPS[Philips Semiconductors]
Part No. 74LVC377 74LVC377D 74LVC377DB 74LVC377PW 74LVC377PWDH 74LVC377_2
OCR Text ... the LOW-to-HIGH transition for predictable operation. CONDITIONS CL = 50pF VCC = 3.3V TYPICAL 6.0 230 5.0 UNIT ns MHz pF pF VI = GND to VCC1 22 NOTES: 1 CPD is used to determine the dynamic power dissipation (PD in W) VCC...
Description From old datasheet system
Octal D-type flip-flop with data enable; positive-edge trigger

File Size 95.61K  /  10 Page

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