| |
|
 |
INTEGRATED DEVICE TECHNOLOGY INC
|
| Part No. |
840021AGLFT
|
| OCR Text |
...igh, q0 output is enabled. when low, forces q0 to high-impedance state. lvcmos/lvttl interface levels. 3, 4 xtal_out, xtal_in input crystal...jitter, random; note 1 integration range: 1.875mhz ? 20mhz 0.34 ps t r / t f output rise/fall time... |
| Description |
125 MHz, OTHER CLOCK GENERATOR, PDSO8
|
| File Size |
692.95K /
14 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
INTEGRATED DEVICE TECHNOLOGY INC
|
| Part No. |
650GI-44LF
|
| OCR Text |
...n all output clocks ? advanced, low-power cmos process ? industrial temperature range (-40 to +85c) ? pb (lead) free package block diagram c...jitter note 1 30 ps absolute jitter, peak-to-peak t ja deviation from mean, note1 & figures 1 and ... |
| Description |
50 MHz, VIDEO CLOCK GENERATOR, PDSO16
|
| File Size |
160.04K /
11 Page |
View
it Online |
Download Datasheet |
| |
|
|
Analog Devices, Inc.
|
| Part No. |
AD9540
|
| OCR Text |
Low Jitter Clock Generator AD9540
FEATURES
Excellent intrinsic jitter performance 25 Mb/s write-speed serial I/O control 200 MHz phase frequency detector inputs 655 MHz programmable input dividers for the phase frequency detector (/M, /N)... |
| Description |
655 MHz Low Jitter Clock Generator
|
| File Size |
476.15K /
32 Page |
View
it Online |
Download Datasheet |
| |
|
|
INTEGRATED DEVICE TECHNOLOGY INC
|
| Part No. |
ICS9212AF-13LF-IN0
|
| OCR Text |
...ler 11 busclk_ stop# in active low output enable/disable 12 pd# in 3.3v cmos active low power down, the device is powered down when the "...jitter t j,in -250ps input duty cycle over 10k cycles dc in 40% 60% t cycle input frequency of modul... |
| Description |
533.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO24
|
| File Size |
165.72K /
8 Page |
View
it Online |
Download Datasheet |
| |
|
|
Vectron International, Inc.
|
| Part No. |
SRM-155 SRM-155A SRM-155B SRM-155C
|
| OCR Text |
...to a voltage and amplified by a low noise transimpedance amplifier. Further gain is provided by the quantizer, which also provides a Flag ou...jitter by rejecting unwanted frequency spectrum. The extracted clock is then precisely aligned with ... |
| Description |
Telecomm/Datacomm
SONET/SDH Fiber-Optic Receiver Module with SAW Filter Clock Recovery and Data Retiming(SONET/SDH 光纤接收模块(带SAW滤波时钟恢复和数据重定时功能))
|
| File Size |
184.47K /
8 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
