|
|
![](images/bg04.gif) |
MITSUBISHI[Mitsubishi Electric Semiconductor]
|
Part No. |
MH32D72KLH-10 MH32D72KLH-75
|
OCR Text |
...q=2.5v 0.2V
144pin 145pin
52pin 53pin
- Double data rate architecture; two data transf ers per clock cy c le - Bidirectional, data strobe (DQS) is transmitted/receiv ed with data - Dif f erential clock inputs (CK0 and /CK0) - data ... |
Description |
2,415,919,104-BIT (33,554,432-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module 2 /415 /919 /104-BIT (33 /554 /432-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
|
File Size |
339.46K /
39 Page |
View
it Online |
Download Datasheet
|
|
|
![](images/bg04.gif) |
MITSUBISHI[Mitsubishi Electric Semiconductor]
|
Part No. |
MH32D72AKLB-10 MH32D72AKLB-75
|
OCR Text |
...q=2.5v 0.2V
144pin 145pin
52pin 53pin
- Double data rate architecture; two data transf ers per clock cy c le - Bidirectional, data strobe (DQS) is transmitted/receiv ed with data - Dif f erential clock inputs (CK0 and /CK0) - data ... |
Description |
2,415,919,104-BIT (33,554,432-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module 2 /415 /919 /104-BIT (33 /554 /432-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
|
File Size |
354.77K /
40 Page |
View
it Online |
Download Datasheet
|
|
|
![](images/bg04.gif) |
MITSUBISHI[Mitsubishi Electric Semiconductor]
|
Part No. |
MH32D72AKLA-10 MH32D72AKLA-75
|
OCR Text |
...q=2.5v 0.2V
144pin 145pin
52pin 53pin
- Double data rate architecture; two data transf ers per clock cy c le - Bidirectional, data strobe (DQS) is transmitted/receiv ed with data - Dif f erential clock inputs (CLK and /CLK) - data ... |
Description |
2,415,919,104-BIT (33,554,432-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module 2 /415 /919 /104-BIT (33 /554 /432-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
|
File Size |
324.12K /
38 Page |
View
it Online |
Download Datasheet
|
|
|
![](images/bg04.gif) |
ALSC[Alliance Semiconductor Corporation]
|
Part No. |
ASM5I9773AG-52-ET ASM5I9773A ASM5I9773A-52-ER ASM5I9773A-52-ET ASM5I9773AG-52-ER
|
OCR Text |
...temperature range: -40C to +85C 52pin 1.0mm TQFP package RoHS Compliance
ASM5I9773A
The ASM5I9773A features one LVPECL and two LVCMOS reference clock inputs and provides 12 outputs partitioned in three banks of four outputs each. Each... |
Description |
Octal D-Type Flip-Flops With Clear 20-SO -40 to 85 Octal D-Type Flip-Flops With Clear 20-SOIC -40 to 85 2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer
|
File Size |
620.40K /
16 Page |
View
it Online |
Download Datasheet
|
|
![](images/findchips_sm.gif)
Price and Availability
|