... to +2.5V Allows Operation from Single Li+ Cell o Small 0.1F Capacitors o Configurable Logic Levels
Features
MAX3228E/MAX3229E
Orde...Dual-Mode Regulated Charge-Pump Voltage Converter
The MAX3228E/MAX3229E internal power supply consi...
Description
【15kV ESD-Protected @.5V to %.5V RS-232 Transceivers in UCSP ?à15kV ESD-Protected 2.5V to 5.5V RS-232 Transceivers in UCSP
... to +2.5V Allows Operation from Single Li+ Cell o Small 0.1F Capacitors o Configurable Logic Levels
Features
MAX3228/MAX3229
Orderi...Dual-Mode Regulated Charge-Pump Voltage Converter
The MAX3228/MAX3229 internal power supply consist...
Description
2.5V to 5.5V RS-232 Tranceivers in UCSP 2.5V to 5.5V RS-232 Transceivers in UCSP
...l enhancement mode devices in a single monolithic structure. Each flip-flop has independent Data, (D), Direct Set, (S), Direct Reset, (R), and Clock (C) inputs and complementary outputs (Q and Q). These devices may be used as shift register...
...l enhancement mode devices in a single monolithic structure. These complementary MOS logic gates find primary use where low power dissipation and/or high noise immunity is desired. Additional characteristics can be found on the Family Data ...
Description
Dual 4-Input NAND Gate, 2-Input NOR/OR Gate, 8-Input AND/NAND Gate ORDERING INFORMATION From old datasheet system Triple Gate
...he output data rate, performs a single-bit quantization, and shapes the quantization noise towards higher frequencies. Subsequent on-chip digital filters reject most of the shaped quantization noise and lower the data rate. Sixteen unique u...
Description
Dual 16-Bit Stereo Audio Sigma-Delta ADC From old datasheet system
...* * * * * Peak S/(N+D) > 100 dB Single 5 V Supply Operation Accepts 16, 18, or 20-Bit Data Words Dual/Single Pin Data Input Modes Programmable WCLK Divider Operating Temperature Range: - 40 to + 85C Low Power Consumption: 40 mW Typical Comp...
...l enhancement mode devices in a single monolithic structure. The part consists of two identical, independent 4-bit latches with separate Strobe (ST) and Master Reset (MR) controls. Separate Disable inputs force the outputs to a high impedan...
Description
From old datasheet system ORDERING INFORMATION Dual 4-Bit Latch
...The MC14LC5540 ADPCM Codec is a single-chip implementation of a PCM Codec-Filter and an ADPCM Encoder/ Decoder, and therefore provides an ef...dual tone generator, noise burst detect and receive gain control. The evaluation board is designed t...
...The MC14LC5540 ADPCM Codec is a single chip implementation of a PCM Codec-Filter and an ADPCM encoder/decoder, and therefore provides an eff...Dual Tone Generator Programmable Transmit Gain, Receive Gain, and Sidetone Gain Low Noise, High Gain...
...12, data is transmitted after a single burst of ringing rather than before the first ringing cycle (as specified in SIN227). The Idle State ...dual tone alert signal detection capability. These new functions eliminate some external application...
Description
CMOS Calling Number Identification Circuit 2 Preliminary Information