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Altera
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| Part No. |
EP1S20F484
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| OCR Text |
...us standards including RapidIO, UTOPIA IV, CSIX, HyperTransportTM technology, 10G Ethernet XSBI, SPI-4 Phase 2 (POS-PHY Level 4), and SFI-4 Differential on-chip termination support for LVDS Support for high-speed external memory, including ... |
| Description |
FPGA (Field-Programmable Gate Array)
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| File Size |
1,369.20K /
260 Page |
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it Online |
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pmc
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| Part No. |
2001523
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| OCR Text |
... and alarms for MIB support.
UTOPIA / ANY-PHY INTERFACE
* Supports 8- and 16-bit UTOPIA L2 and Any-PHY cell interfaces at clock rates up...2 cell FIFO
Rx IMA Data Processor (RDAT)
Cell Writer Cell Reader
31 chan 4 cell FIFO
Any-P... |
| Description |
From old datasheet system
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| File Size |
29.33K /
2 Page |
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it Online |
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pmc
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| Part No. |
2002199
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| OCR Text |
...hen loops the cells back on the UTOPIA interface. The test then checks the AAL1gator for dropped cells and sequence number errors. The data ...2.1.2 Software Source Code Installation The following steps install the software development environ... |
| Description |
From old datasheet system
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| File Size |
81.50K /
11 Page |
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it Online |
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IDT
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| Part No. |
79RC32351
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| OCR Text |
...Serial Channels
GPIO Pins
Utopia 1 / 2
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
1 of 42
2002 Integrated Device Technology, Inc.
December 17, 2002
DSC 6053
IDT 79RC32351
- S... |
| Description |
Integrated Communications Processor
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| File Size |
545.24K /
42 Page |
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it Online |
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Price and Availability
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