| |
|
 |
Samsung Electronics
|
| Part No. |
K9HBG08U1M K9MCG08U5M K9LAG08U0M
|
| OCR Text |
...5M : 50ns(Min.) * Memory Cell : 2bit / Memory Cell * Fast Write Cycle Time - Program time : 800s(Typ.) - Block Erase Time : 1.5ms(Typ.) * Command/Address/Data Multiplexed I/O Port * Hardware Data Protection - Program/Erase Lockout During Po... |
| Description |
Flash Memory
|
| File Size |
995.63K /
45 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
CHIP
|
| Part No. |
CP1121A
|
| OCR Text |
...e 77.76MHz Telecom Bus, or Two 2bit-width 77.76MHz Telecom Bus 21 channel E1 mapper 21 channels E1 asynchronous mapping and de-mapping to/from a STM-1. 1+1 path protection, re-timing mode for channel #0 to #7 High and low order cross con... |
| Description |
STM-1/4 Single Chip Add/Drop Multiplexer System Device
|
| File Size |
86.48K /
2 Page |
View
it Online |
Download Datasheet |
| |
|
|
CHIP
|
| Part No. |
CP1122A
|
| OCR Text |
...te-width 19.44 Telecom Bus Two 2bit-width 77.76MHz Telecom Bus 21 channel E1 mapper 21 channels E1 asynchronous mapping and de-mapping to/from a STM-1. 1+1 path protection, re-timing mode for channel #0 to #7 High and low order cross con... |
| Description |
STM-1 Single Chip Add/Drop Multiplexer System Device
|
| File Size |
86.47K /
2 Page |
View
it Online |
Download Datasheet |
| |
|
|
Galvantech
|
| Part No. |
GVT7164B36 7164B36S
|
| OCR Text |
...nous peripheral circuitry and a 2bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edgetriggered clock input (CLK). The synchronous inputs include all addresses, all data inputs... |
| Description |
64K X 36 SYNCHRONOUS BURST SRAM
From old datasheet system
|
| File Size |
145.33K /
13 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
