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ICS
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| Part No. |
M2004-X1
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| OCR Text |
...ts are VCSO (Voltage Controlled SAW Oscillator) based clock generator PLLs designed for clock frequency translation and jitter attenuation in a high-speed data communications system. The clock multiplication ratio and output divider ratio a... |
| Description |
SAW PLL Frequency Translation Family with Hitless Switching options
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| File Size |
73.58K /
1 Page |
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it Online |
Download Datasheet
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ICS
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| Part No. |
M2004-X2
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| OCR Text |
...ts are VCSO (Voltage Controlled SAW Oscillator) based clock generator PLLs designed for clock frequency translation and jitter attenuation in a high-speed data communications system. The clock multiplication ratio and output divider ratio a... |
| Description |
SAW PLL Frequency Translation Family with Hitless Switching options
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| File Size |
70.22K /
1 Page |
View
it Online |
Download Datasheet |
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ICS
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| Part No. |
M2004-X3
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| OCR Text |
...23 are VCSO (Voltage Controlled SAW Oscillator) based clock generator PLLs designed for clock frequency translation and jitter attenuation in a high-speed data communications system. The clock multiplication ratio and output divider ratio a... |
| Description |
SAW PLL Frequency Translation Family with Loss of Lock indicator and Hitless Switching options
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| File Size |
65.43K /
1 Page |
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it Online |
Download Datasheet |
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ICS
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| Part No. |
M2004-X4
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| OCR Text |
...ts are VCSO (Voltage Controlled SAW Oscillator) based clock generator PLLs designed for clock frequency translation and jitter attenuation in a high-speed data communications system. External loop components allow the tailoring of PLL loop ... |
| Description |
SAW PLL Frequency Translation Family with Loss of Lock indicator and Hitless Switching options
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| File Size |
69.65K /
1 Page |
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it Online |
Download Datasheet |
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Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
INTEGRATED DEVICE TECHNOLOGY INC
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| Part No. |
M2040 M2040-01I400.0000 M2040-01-400.0000 M2040-01I533.3334 M2040-01-533.3334
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| OCR Text |
...0 is a VCSO (Voltage Controlled SAW Oscillator) based clock generator PLL designed for clock protection, frequency translation and jitter attenuation in fault tolerant computing applications. It features dual differential inputs with two mo... |
| Description |
FREQUENCY TRANSLATION PLL WITH AUTOSWITCH
SAW PLL for Fault Tolerant Computers with automatic reference clock reselection, Loss of Lock indicator, and Hitless Switching
PHASE LOCKED LOOP, 285 MHz, CQCC36
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| File Size |
189.51K /
12 Page |
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it Online |
Download Datasheet |
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Atmel Corp
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| Part No. |
T0353NBSP
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| OCR Text |
...lues are also influenced by the SAW filter. No correction has been made for filter loss (1.6 dB) and interstage board trace losses.
No. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type* Combined LNA and Mixer Performance, CDM... |
| Description |
2.8 V Tri-band/Quad-mode RF Receiver for CDMA/AMPS/GPS
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| File Size |
114.83K /
11 Page |
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it Online |
Download Datasheet |
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Panasonic Corporation
PANASONIC[Panasonic Semiconductor]
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| Part No. |
AN5491 AN5491K
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| OCR Text |
... det. V-BLK gen.
FBP in 41 V-SAW correction
V/I converter H-parabola Trape 7 6
40 Counter input Ramp /AGC VP slice 16 13 14 12 15 17 ...based on the IC design and are not guaranteed.
Parameter DC characteristics AGC pulse width Ramp ... |
| Description |
Synchronous signal and deflection distortion correction processing IC supporting I2C bus for HD wide television
Synchronous signal and deflection distortion correction processing IC supporting I2C bus for HD, wide television
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| File Size |
151.43K /
17 Page |
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it Online |
Download Datasheet |
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Price and Availability
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