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For predictable Found Datasheets File :: 1773    Search Time::0.938ms    
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    INTERPOINT[Interpoint Corporation Company]
Part No. MHF2805SF_883 MHF283R3S MHF283R3SF_883 MHF285R2SF_883 MHF2805DF_883 MHF2812DF_883 MHF2812SF_883 MHF2815DF_883 MHF2815SF_883 MHF2828SF_883
OCR Text ...ut power (20% on 2805D models). predictable current limit is accomplished by directly monitoring the output load current and providing a constant current output above the overload point. SYNCHRONIZATION A synchronization feature is incl...
Description DC/DC CONVERTERS 28 VOLT INPUT

File Size 309.18K  /  21 Page

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    MOTOROLA[Motorola, Inc]
Motorola Inc
MOTOROLA[Motorola Inc]
Part No. SN74LS398N SN74LS398D SN54LS398 SN74LS398DW SN54LS399J SN74LS399N SN54LS398J SN74LS399D SN74LS399DW
OCR Text ...ansition of the Clock input for predictable operation. The SN54 / 74LS398 has both Q and Q Outputs available. FUNCTION TABLE INPUTS S I I h h I0 I h X X I1 X X I h Q L H L H OUTPUTS Q* H L H L *SN54 / 74LS398 only I = LOW Voltage Lev...
Description QUAD 2-PORT REGISTER

File Size 208.76K  /  6 Page

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    MB2377 MB2377BB

NXP Semiconductors
Philips Semiconductors
Part No. MB2377 MB2377BB
OCR Text ...ow-to-High clock transition for predictable operation. DESCRIPTION The MB2377 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The MB2377 has two 8-bit, edge trigger...
Description DUAL OCTAL D-TYPE FLIP-FLOP WITH ENABLE

File Size 106.98K  /  8 Page

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    NXP Semiconductors N.V.
Philips
Part No. 74ABT74 74ABT74N112 74ABT74D118 74ABT74DB 74ABT74PW-T 74ABT74D112 74ABT74DB-T
OCR Text ...igh transition of the clock for predictable operation. Clock triggering occurs at a voltage level and is not directly related to the transition time of the positive-going pulse. Following the hold time interval, data at the D input may be c...
Description From old datasheet system
Dual D-type flip-flop

File Size 43.61K  /  5 Page

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    PALCE22V10 PALCE22V10Z-25JC PALCE22V10H-15JC_4 PALCE22V10H-15PC_4 PALCE22V10H-10PC_5 PALCE22V10Z-15JI PALCE22V10Z-25SI P

LATTICE[Lattice Semiconductor]
Part No. PALCE22V10 PALCE22V10Z-25JC PALCE22V10H-15JC_4 PALCE22V10H-15PC_4 PALCE22V10H-10PC_5 PALCE22V10Z-15JI PALCE22V10Z-25SI PALCE22V10H-10JC_5 PALCE22V10H-10JI_5 PALCE22V10H-10SC_5 PALCE22V10H-15JI_4 PALCE22V10H-15PI_4 PALCE22V10H-15SC_4 PALCE22V10H-20JI_4 PALCE22V10H-20PI_4 PALCE22V10H-25JC_4 PALCE22V10H-25JI_4 PALCE22V10H-25PC_4 PALCE22V10H-25PI_4 PALCE22V10H-25SC_4 PALCE22V10H-5JC_5 PALCE22V10H-7JC_5 PALCE22V10H-7PC_5 PALCE22V10Q-10JC_5 PALCE22V10Q-10PC_5 PALCE22V10Q-15JC_5 PALCE22V10Q-15PC_5 PALCE22V10Q-25JC_4 PALCE22V10Q-25PC_4 PALCE22V10Z-15PI PALCE22V10Z-25JI PALCE22V10Z-25PC PALCE22V10Z-25PI PALCE22V10Z-25SC PALCE22V10H-10PI_5 PALCE22V10H-10JC/5 PALCE22V10H-10JI/5 PALCE22V10H-10PC/5 PALCE22V10H-10PI/5 PALCE22V10H-10SC/5 PALCE22V10H-25JC/4 PALCE22V10H-25JI/4 PALCE22V10H-25PI/4
OCR Text ...ops power up to a logic LOW for predictable system initialization. Outputs of the PALCE22V10 will depend on the programmed output polarity. The VCC rise must be monotonic, and the reset delay time is 1000ns maximum. Register Preload The reg...
Description 24-PIN EE CMOS (ZERO POWER) VERSATILE PAL DEVICE

File Size 428.91K  /  34 Page

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    74ABT377A 74ABT377AD 74ABT377ADB 74ABT377AN 74ABT377APW 74ABT377PWADH

NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
Part No. 74ABT377A 74ABT377AD 74ABT377ADB 74ABT377AN 74ABT377APW 74ABT377PWADH
OCR Text ...ow-to-High clock transition for predictable operation. * Power-up reset QUICK REFERENCE DATA SYMBOL tPLH tPHL CIN ICCH PARAMETER Propagation delay CP to Qn Input capacitance Total current supply CONDITIONS Tamb = 25C; GND = 0V CL = 5...
Description Quadruple 2-Line To 1-Line Data Selectors/Multiplexers 16-SOIC 0 to 70
Octal D-type flip-flop with enable
From old datasheet system

File Size 56.08K  /  12 Page

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    74ALS109AN 74ALS109A 74ALS109AD

Rochester Electronics, LLC
PHILIPS[Philips Semiconductors]
NXP Semiconductors
Part No. 74ALS109AN 74ALS109A 74ALS109AD
OCR Text ...igh transition of the clock for predictable operation. The JK design allows operation as a D flip-flop by tying J and K inputs together. Although the clock input is level sensitive, the positive transition of the clock pulse between the 0.8...
Description Dual J-K positive edge-triggered flip-flop with set and reset ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16

File Size 87.67K  /  9 Page

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    Philips
Part No. 74HCT194 74HCT194N 74HCT194D
OCR Text ...nput is permitted to change for predictable output performance. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. The shaded areas indicate when the input is permitted to change for predictable output performance. (1)...
Description 74HC/HCT194; 4-bit bidirectional universal shift register

File Size 77.72K  /  11 Page

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    N74F399N N74F399D 74F398 74F399

NXP Semiconductors
PHILIPS[Philips Semiconductors]
Part No. N74F399N N74F399D 74F398 74F399
OCR Text ...ansition of the Clock input for predictable operation. The 74F398 has both Q and Q outputs. TYPICAL SUPPLY CURRENT (TOTAL) 25mA 22mA PIN CONFIGURATION - 74F398 S Qa Qa I0a I1a I1b I0b Qb Qb GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 ...
Description Registers

File Size 88.58K  /  10 Page

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