...cy (Low Inductance, 500 MHz - 3 ghz) PIN Diodes
Part Package Number Marking HSMP- Code[1] Configuration 489x GA Dual Anode Test Conditions ...pair used in a 900 MHz Transmit/Receive Switch.
Figure 11. HSMP-389V Series/Shunt pair used in a ...
...equency of the hsp061-4ny8 is 6 ghz which is high enough to manage hdmi signals at 3.4 gbps. figure 6. s21 attenuation measurement table 1....pair must be equal to minimize intra pair skew. length of lines in different differential pair must...
Description
This Application note presents the HSP061-4NY8 and its capability
...(cml) inputs wide bandwidth (3 ghz) 48.5 db limiting gain noise figure typically 11 db automatic offset compensation input level-detect...pair in and inq and to the output signal pair out and outq. the two lines in each pair should have t...
...opagation delay (typical) ? 1.5 ghz operation (2.2 ghz max. toggle frequency) ? 1.2 ps rms period jitter (typ.) ? pecl mode supply range: v ...pair is active (d efault condition with no connection to pin) clka can be driven with ecl- or pecl-c...
...hz to 20-mhz offset) up to 1.5-ghz operation output enable and synchronous clock enable functions 20-pin thin shrunk small outline packag...pair s using the in_sel pin. the synchronous clock enable function ensures glitch-free output transi...
Description
1:4 Differential LVDS Fanout Buffer with Selectable Clock Input